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SUMMARY: Research Fellow, Invited Auxiliary Professor at ISTAR-IUL, ISCTE, currently researching neuromorphic systems for end-to-end application of machine learning to enhanced living spaces via digital assistance.I am an experienced hands-on innovator and educator, interested in developing new research areas, and applying my creativity to solve new problems by fostering strong interaction between academia and industry with focus on developing research results with practical application, leveraging my industrial experience at an academic research setting.    My recent interests involve the interaction of efficient implementation and application of machine learning/deep neural networks, cloud workloads and cluster systems, application of systems research to large data sets and machine learning analytics, compilers, compilation techniques and (micro) architecture, (processing) system architecture at the node and cluster level, power-efficient computing, heterogeneous processing systems (CPUs, GPUs), with goals of influencing applications, products, and innovation. I foresee potential development of analysis and data mining tools and computing systems to further ISCTE's mission related to natural interaction and communication. I have successfully submitted and received approval for a research project under Horizon-2020 on heterogeneous computing, as part of a consortium with 6 leading European universities, of which I was one of the Principal Investigators for AMD (CHIST-ERA Research Grant. Distributed Heterogeneous Vertically-Integrated Energy-Efficient Data Centres. Total  2M euros , AMD portion  800K euros , Jul 2014.) Recently I've worked on understanding and optimizing cloud applications and cloud workload analysis (MapReduce, Hadoop, GraphLab), focusing on system-level characterization an innovation for power efficient computing and dense servers. In collaboration with researchers at Rice University we have developed efficient acceleration for Hadoop Map-Reduce and Machine Learning applications on GPU accelerated systems. I also investigate efficient implementation of Deep Neural Network algorithms on CPU+GPU accelerated systems and developed novel algorithms for CPU/GPU code migration (speeding up face detection algorithms on APUs), found ways to program multi-core systems and to use GPUs in the cloud, and to use multiple cores to speed up single-thread performance. My current research interests include application and optimization of recurrent neural networks. My previous projects relate to binary translation (enabling many cores by building smaller legacy-free systems, transactional memory performance evaluation, microcode compression(algorithmic research on ways to save microprocessor core space [adopted in two currently-shipping high-volume production microprocessor designs, US$18M savings]) and co-designed architectural features to enable low-power high-single-thread performance for small cores. I am the creator and serve as general chair of the International Workshop on Architectural/Microarchitectural Support for Binary Translation, joint with ISCA (ACM/IEEE International Symposium on Computer Architecture) and CGO. I have 56 U.S. Patents Issued plus more 55 U.S. Patents Pending
Identificação

Identificação pessoal

Nome completo
Mauricio Breternitz Jr

Nomes de citação

  • Jr, Mauricio
  • M.Breternitz

Identificadores de autor

Ciência ID
F01D-62A9-B4CD
ORCID iD
0000-0003-1752-6255
Google Scholar ID
pnmGA74AAAAJ

Websites

  • http://www.linkedin.com/in/mbreternitz (Pessoal)
  • https://mauriciobreternitz.github.io/ (Pessoal)
  • http://scholar.google.com/citations?user=pnmGA74AAAAJ (Académico)

Domínios de atuação

  • Ciências da Engenharia e Tecnologias - Engenharia Eletrotécnica, Eletrónica e Informática - Hardware e Arquitetura de Computadores
  • Ciências da Engenharia e Tecnologias - Engenharia Eletrotécnica, Eletrónica e Informática
  • Ciências Exatas - Ciências da Computação e da Informação

Idiomas

Idioma Conversação Leitura Escrita Compreensão Peer-review
Inglês Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2)
Português (Idioma materno)
Produções

Publicações

Artigo em conferência
  1. Felipe Franca; M.Breternitz; Leandro Araujo. "Memory Efficient Weightless Neural Network using Bloom Filter". Trabalho apresentado em 27 th European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning, --, 2019.
    Publicado
  2. Silva, H.; Resende, R.; Breternitz, M.. "Mixed reality application to support infrastructure maintenance". Trabalho apresentado em 2nd International Young Engineers Forum, YEF-ECE 2018, Costa da Caparica, 2018.
    Publicado • 10.1109/YEF-ECE.2018.8368938
  3. Lebeane, M.; Hamidouche, K.; Benton, B.; Breternitz, M.; Reinhardt, S. K.; John, L. K.. "ComP-Net: command processor networking for efficient intra-kernel communications on GPUs". Trabalho apresentado em Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, Limassol, 2018.
    Publicado • 10.1145/3243176.3243179
  4. Benedicto, C.; Rodrigues, I. L.; Tygel, M.; Breternitz, M.; Borin, E.. "Harvesting the computational power of heterogeneous clusters to accelerate seismic processing". Trabalho apresentado em Global Meeting Expanded Abstracts, Rio de Janeiro, 2017.
    Publicado • 10.1190/sbgf2017-070
Artigo em revista
  1. Rosario, V. M. Do; Breternitz, M.; Borin, E.. "Efficiency and scalability of Multi-Lane Capsule Networks (MLCN)". Journal of Parallel and Distributed Computing 155 (2021): 63-73. https://www.sciencedirect.com/journal/journal-of-parallel-and-distributed-computing.
    Publicado • 10.1016/j.jpdc.2021.04.010
  2. Martins do Rosário, V. ; Silva, A. F. Da; Camacho, T. A. S.; Napoli, O. O. ; Breternitz, M.; Borin, E.. "Smart selection of optimizations in dynamic compilers". Concurrency and Computation: Practice and Experience N/A (2021): https://onlinelibrary.wiley.com/journal/15320634.
    Publicado • 10.1002/cpe.6089
  3. Pisani, Flávia; Lucas Pascotti Valem; Pedronette, Daniel Carlos Guimaraes; Torres, Ricardo da S; Borin, Edson; M.Breternitz. "A unified model for accelerating unsupervised iterative re-ranking algorithms". Concurrency and Computation: Practice and Experience 32 14 (2020): https://onlionelibrary.wiley.com/.
    Publicado • 10.1002/cpe.5702
  4. M.Breternitz; Leandro Araujo; L.Verona; F.Rangel; F.Firmino; D.Menasche; W.Caarls; et al. "Weightless neural networks as memory segmented bloom filters". Neurocomputing Volume 416 27 Novembe (2020): https://www.journals.elsevier.com/neurocomputing.
    Publicado • 10.1016/j.neucom.2020.01.115
  5. Grossman, M.; Breternitz, M.; Sarkar, V.. "Hadoopcl2: motivating the design of a distributed, heterogeneous programming system with machine-learning applications". IEEE Transactions on Parallel and Distributed Systems 27 3 (2016): 762-775. http://ieeexplore.ieee.org/document/7064791/.
    Publicado • 10.1109/TPDS.2015.2414943
  6. Piga, L.; Bergamaschi, R. A.; Breternitz, M.; Rigo, S.. "Adaptive global power optimization for Web servers". The Journal of Supercomputing 68 3 (2014): 1088-1112. https://link.springer.com/article/10.1007/s11227-014-1141-x.
    Publicado • 10.1007/s11227-014-1141-x
  7. Borin, E.; Araujo, G.; Breternitz, M.; Wu, Y.. "Microcode compression using structured-constrained clustering". International Journal of Parallel Programming 42 1 (2014): 140-164. https://link.springer.com/article/10.1007%2Fs10766-012-0206-9.
    Publicado • 10.1007/s10766-012-0206-9
  8. Bernstein, D.; Breternitz, M.; Gheith, A. M.; Mendelson, B.. "Solutions and debugging for data consistency in multiprocessors with noncoherent caches". International Journal of Parallel Programming 23 1 (1995): 83-103. https://link.springer.com/article/10.1007%2FBF02577785.
    Publicado • 10.1007/BF02577785

Outros

Outra produção
  1. Ciencia na Industria. Computacao Podcast. 2020. M.Breternitz. https://computacaopodcast.com.br/.
  2. Neuromorphic Computing: Key Concepts, Status, Promise and Research Challenges. LMCAD Seminar. 2020. M.Breternitz. https://lmcad.ic.unicamp.br/news.html.
  3. Introducao `a Arquitetura de Computadores. Aula convidada IAC DEI Instituto Superior Tecnico. 2020. M.Breternitz. https://fenix.tecnico.ulisboa.pt/disciplinas/IAC45179577/2020-2021/1-semestre.
  4. Efficiency and Scalability of Multi-Lane Capsule Networks (MLCN). CIENCIA 2019 Encontro com a Ciencia e Tecnologia em Portugal. 2019. M.Breternitz. https://ciencia.iscte-iul.pt/publications/efficiency-and-scalability-of-multi-lane-capsule-networks-mlcn-/61916?lang=en.
    10.1109/SBAC-PAD.2019.00034
Atividades

Curso / Disciplina lecionado

Disciplina Curso (Tipo) Instituição / Organização
2018/02 - 2018/07 Development of Web Applications Open Source Software (Curso de mestrado (conclusão do curso de especialização)) ISCTE-Instituto Universitário de Lisboa, Portugal
2017/09 - 2018/01 Open Source Operating System Open Source Software (Curso de mestrado (conclusão do curso de especialização)) ISCTE-Instituto Universitário de Lisboa, Portugal