Pedro Tomás received his Licentiate, MSc, and PhD degrees in Electrical and Computer Engineering from Instituto Superior Técnico (IST), Technical University of Lisbon, Portugal, in 2003, 2006, and 2009, respectively. He is currently an Associate Professor at the Department of Electrical and Computer Engineering, IST, Universidade de Lisboa. He is the coordinator of the High-Performance Computing Architectures and Systems (HPCAS) research group at INESC-ID since 2022, and leads the Computing Systems specialization of the MSc in ECE at IST since 2021. In these roles, he has been responsible for defining research directions, coordinating multidisciplinary teams, and contributing to the development of advanced education and training in computing systems. His research focuses on next-generation computing architectures, including general-purpose and specialized processors (CPUs, GPUs), as well as reconfigurable and heterogeneous systems (e.g., FPGA-based platforms), targeting both embedded and high-performance computing domains. His work addresses key challenges in performance, energy efficiency, and scalability, which are central to modern computing infrastructures. He has a strong track record in developing cross-layer optimization techniques for energy-efficient computing systems. His contributions span architecture-level specialization (including reconfigurable computing), operating system–level resource management (e.g., energy-aware scheduling and DVFS for CPUs and GPUs), and system-level modeling of performance, power, and energy. More recently, his research has focused on data-centric architectures, particularly data-streaming approaches for efficient data movement in many-core and domain-specific architectures. Pedro Tomás has extensive experience in supervising and mentoring researchers, having successfully supervised four PhD students and currently supervising multiple PhD candidates across topics in computer architecture and deep learning systems. He has also supervised over 100 MSc students, contributing significantly to the training of highly skilled engineers and researchers. He has been actively involved in competitive European research projects, including EPI-SGA1, EPI-SGA2, DARE-SGA1, and CHORYS (focused on RISC-V-based accelerators), as well as SEQURED and ORQUESTRA (focused on quantum-resistant secure systems). His participation in these projects reflects his ability to contribute to large-scale, collaborative, and multidisciplinary research initiatives aligned with European strategic priorities. Additionally, he also contributed to multiple national projects (FCT-funded), both as PI and as a team member. He has authored over 100 peer-reviewed publications in leading international conferences and journals, including top-tier venues such as ISCA, HPCA, and MICRO, demonstrating sustained scientific impact in the field of computer architecture. He has also contributed to the scientific community through conference organization (e.g., EUSIPCO, ISCAS, SIPS, Euro-Par) and by serving as an evaluator for research proposals for the European Commission and the MSCA Postdoctoral Fellowship programme. He is a Senior Member of IEEE.