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João Goes graduated from Instituto Superior Técnico (IST), Lisbon, in Electrical and Computer Engineering (ECE), in 1992. He obtained the M.Sc. and the Ph.D. degrees in ECE, respectively, in 1996 and 2000, from the Technical University of Lisbon and the ‘Habilitation' degree, in Electronics, in 2012 from the NOVA University of Lisbon (NOVA). Since 1998 João Goes has been with the Department of Electrical and Computer Engineering (DEEC) of the School of Sciences and Technology of NOVA where he is a Full Professor. From 2012 till 2019 He headed the DEEC, comprising 50 professors and over 1000 students. From 2012 to 2017, he was the Director of the Centre of Technology and Systems (CTS) of the Research Institute for New Technologies (UNINOVA), leading nearly 50 Senior Researchers with a PhD, over 70 collaborators and more than 90 PhD students. Since 2023 he is the Executive Director of UNINOVA. He has been elected a member of the Scientific Council of FCT NOVA for 12 years, and he has been elected a member of the General Council of NOVA, the top governing body the University, for the 2022-2025 term. In 2003 he co-founded and served as CTO of ACACIA Semi. SA, a Portuguese engineering company specialized in high-performance analog front-end products (now RENESAS). From 1997 until 1998 João was Project Manager at CHIPIDEA SA (now SYNOPSYS). He was the first Engineer hired. From 1993 to 1997 he worked as a Researcher at Integrated Circuits and Systems Group (GCSI) at IST doing research on data converters and filters. Since 1992 he has participated and led several National and European projects in science, technology, networking, and training. He has been the Primary Investigator of over 20 projects. João Goes has published over 200 papers in international journals (50+) and IEEE leading conferences, he holds 4 international patents, and he is co-author of 8 books. He is the Portuguese researcher with more published papers in all IEEE flagship conferences (“Chip Olympics”), requiring silicon-proven integrated circuits (ICs), with measured performance beyond the state-of-the-art (ISSCC, VLSI, CICC and ESSCIRC). His research interests and contributions are in analog and mixed-signal (AMS) integrated circuit design, with special emphasis on sensor-to-digital and digital-to-actuator interfaces, data-converters (ADCs and DACs) and high-performance analog frontends (AFEs). Among several best-paper awards, he is co-author of the journal paper recipient (winner) of the 2012 IEEE CASS Outstanding Young Author Award and co-winner (1st place) of the first edition of the “Innovation Award INCM” in 2016. He was the Chairman of the IEEE CASS Analog Signal Processing Technical Committee, for the term 2013-2015. He was Associate Editor (AE) of IEEE Transactions on Circuits and Systems–II, for the period 2016-2023 and he is (2024 -) AE of IEEE Transactions on Circuits and Systems–I.
Identificação

Identificação pessoal

Nome completo
João Carlos da Palma Goes

Nomes de citação

  • Goes, João

Identificadores de autor

Ciência ID
3E1C-5E04-30D5
ORCID iD
0000-0002-8434-8391

Telefones

Telemóvel
  • 962686117 (Pessoal)

Moradas

  • Rua Vicente Dias, no. 12, 3º-D, 1400-358, Lisbon, Lisbon, Portugal (Pessoal)

Websites

Domínios de atuação

  • Ciências da Engenharia e Tecnologias - Engenharia Eletrotécnica, Eletrónica e Informática - Engenharia Eletrotécnica e Eletrónica

Idiomas

Idioma Conversação Leitura Escrita Compreensão Peer-review
Português (Idioma materno)
Inglês Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2)
Italiano Utilizador independente (B2) Utilizador independente (B2) Utilizador independente (B2) Utilizador independente (B2) Utilizador independente (B2)
Formação
Grau Classificação
2012
Concluído
Ciências de Engenharia Electrotécnica e de Computadores (Título de Agregado)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Approved
2000
Concluído
Engenharia Electrotécnica e de Computadores (Doutoramento)
Especialização em Electrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Optimization of Self-calibrated Cmos Pipelined Analogue-to-digital Converters" (TESE/DISSERTAÇÃO)
Approved
Percurso profissional

Docência no Ensino Superior

Categoria Profissional
Instituição de acolhimento
Empregador
2018/01/01 - Atual Professor Catedrático (Docente Universitário) Universidade Nova de Lisboa, Portugal
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2017 - 2018 Professor Associado (Docente Universitário) Universidade Nova de Lisboa, Portugal
2013 - 2016 Professor Associado (Docente Universitário) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal

Cargos e Funções

Categoria Profissional
Instituição de acolhimento
Empregador
2013 - 2019/12 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2017 - 2018 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa, Portugal
2013 - 2014 Conselho científico/técnico-científico ou orgão correspondente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Projetos

Projeto

Designação Financiadores
2021/01/01 - 2025/12/31 Laboratório Associado de Sistemas Inteligentes
LA/P/0104/2020
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Universidade de Aveiro Centro de Tecnologia Mecânica e Automação, Portugal

Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal

Universidade do Minho, Portugal

Universidade do Porto Faculdade de Ciências, Portugal

Universidade do Porto Centro de Matemática, Portugal

Instituto Politécnico do Cávado e do Ave, Portugal

Universidade do Porto Laboratório de Inteligência Artificial e Ciência de Computadores, Portugal

Universidade de Aveiro, Portugal

Universidade do Minho Instituto de Polímeros e Compósitos, Portugal

Universidade de Aveiro Instituto de Engenharia Eletrónica e Informática de Aveiro, Portugal

Universidade do Minho Centro ALGORITMI, Portugal

Universidade Nova de Lisboa Unidade de Investigação e Desenvolvimento em Engenharia Mecânica e Industrial, Portugal

Instituto Politécnico do Porto Instituto Superior de Engenharia do Porto, Portugal

Universidade de Coimbra, Portugal

Universidade de Coimbra Centro de Informatica e Sistemas, Portugal

Instituto Politécnico do Porto Grupo de Investigação em Engenharia e Computação Inteligente para a Inovação e o Desenvolvimento, Portugal

Universidade NOVA de Lisboa, Portugal

Universidade do Porto Faculdade de Engenharia, Portugal
Fundação para a Ciência e a Tecnologia
Em curso
2022/10/10 - 2024/09/30 QUAD ADC - ESA contract no. 40001139457/22/NL/CRS
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
European Space Agency
Em curso
2021/03/01 - 2024/02/29 Papel Inteligente para sistemas de identificação - IDS-Paper
PTDC/CTM-PAM/4241/2020
Universidade NOVA de Lisboa, Portugal

Instituto de Nanoestruturas Nanomodelação e Nanofabricação, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Em curso
2020/01/26 - 2023/12/31 EUGreenGrid
Horizon 2020 Call: H2020-LC-GD-2020 (Building a low-carbon, climate resilient future: Research and innovation in support of the European Green Deal)
Universidade de Lisboa Centro de Investigação em Arquitetura Urbanismo e Design, Portugal
Em curso
2020/05/01 - 2023/04/03 ESTAT - Eco Solar Transformer Architecture Technology
ESTAT - SEP-210725232
Universidade de Lisboa Centro de Investigação em Arquitetura Urbanismo e Design, Portugal
EU Framework Programme for Research and Innovation Euratom
Em curso
2020/04/01 - 2022/03/31 Blind Calibration of SAR-Assisted Time-Interleaved Pipeline ADCs using Advanced Machine-Learning Techniques
XILINX - 2
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Xilinx Inc
Em curso
2019/02/01 - 2022/01/31 Data fusion of sensor networks and fire spread modelling for decision support in forest fire suppression.
PCIF/SSI/0102/2017
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Universidade de Aveiro, Portugal

Universidade Nova de Lisboa, Portugal

Universidade de Lisboa Instituto Superior de Agronomia, Portugal

Instituto de Telecomunicações, Portugal

Direção-Geral do Território, Portugal
Fundação para a Ciência e a Tecnologia
Em curso
2019/01/02 - 2021/01/01 IPSTERS - Sistema de Reconhecimento Terrestre do IPSentinel
DSAIPA/AI/0100/2018
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Direção-Geral do Território, Portugal

Universidade NOVA de Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Em curso
2019/01/01 - 2019/12/31 Centro de Tecnologias e Sistemas (CTS)
UID/EEA/00066/2019
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2014 - 2017 INPACtOR - The future INterconnected Physical And Cyber wORlds
UID/EEA/00066/2014
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2013/04/01 - 2016/12/31 A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems.
EXCL/EEI-ELC/0261/2012
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto de Telecomunicações, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2011/02/01 - 2014/07/31 Detector de raios-X plano para aplicações em medicina MARx
PTDC/EEA-ELC/115577/2009
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2011/01/01 - 2013/12/31 Projecto Estratégico - UI 66 - 2011-2012
PEst-OE/EEI/UI0066/2011
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2010 - 2012 IMPACT - Inovações em amplificação paramétrica aplicada a circuitos integrados CMOS
PTDC/EEA-ELC/101421/2008
PTDC/EEA-ELC/101421/2008
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2007 - 2011 LEADER - Conversor Analógico-Digital de Baixa Energia com Resolução Efectiva Acrescida
PTDC/EEA-ELC/69791/2006
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2007 - 2010 High-Speed High-Resolution Radiation-Hardened ADC Technology
AO/1-4686/04/NL/HE
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
European Space Agency
Concluído
2005 - 2008 SIPHASE - PROJECTO DE CIRCUITOS EM CONDENSADORES COMUTADOS EM TECNOLOGIAS CMOS UTILIZANDO UMA ÚNICA FASE DE RELÓGIO
POSI/EEA-ESE/61863/2004
POSI/EEA-ESE/61863/2004
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2004 - 2006 SECA - Conversor A/D Concorrencial de Video, Auto-Calibrado, de Baixa Potência e de Baixa Tensão de Alimentação com Função de Auto-Teste
POCTI/ESE/47061/2002
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
2002 - 2006 SAMBA - Módulo Inteligente de Interface Analógico-Digital para Aplicações Biomédicas
POCTI/ESE/41804/2001
Investigador responsável
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluído
Produções

Publicações

Artigo em conferência
  1. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "Chairs' Message". 2023.
    10.1109/ESSDERC59256.2023.10268541
  2. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "ESSDERC 2023 Program". 2023.
    10.1109/ESSDERC59256.2023.10268563
  3. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "Chairs' Message". 2023.
    10.1109/ESSCIRC59616.2023.10268747
  4. Leonardo, D.; Xavier, J.; Oliveira, J.; Goes, J.. "A Skew-Insensitive Switched Source-Follower Analog Frontend for Time-Interleaved ADCs". 2023.
    10.1109/PRIME58259.2023.10161843
  5. Xavier, J.; Leonardo, D.; Barquinha, P.; Goes, J.. "Predictive Integrators with Thermal Noise Cancellation". 2023.
    10.1109/ISCAS46773.2023.10181999
  6. Dias, D.; Goes, J.; Costa, T.. "A Parasitic Resistance Extraction Tool Leveraged by Image Processing". 2022.
    10.1109/ISCAS48785.2022.9937879
  7. Correia, Ana; Tavares, Vitor Grade; Barquinha, Pedro; Goes, Joao. "Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers". 2021.
    10.1109/dcis53048.2021.9666176
  8. Xavier, Joao; Barquinha, Pedro; Goes, Joao. "Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS". Vila do Conde, 2021.
    10.1109/dcis53048.2021.9666185
  9. Wadhwa, N.; Bahubalindruni, P.; Correia, A.; Goes, J.; Deb, S.; Barquinha, P.. "Mostly passive ¿ - s ADC with a-IGZO TFTs for flexible electronics". 2021.
    10.1109/ISCAS51556.2021.9401704
  10. Goes, Joao; Tardivel, Benjamin; de Melo, Joao; Marques, Joao. "A Temperature-Compensated Class-AB Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs". Trabalho apresentado em IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
    10.1109/iscas45731.2020.9180530
  11. Goes, J.; Tardivel, B.; de Melo, J.; Marques, J.. "A temperature-compensated class-AB parametric residue amplifier for SAR-assisted pipeline ADCs". 2020.
  12. Sniatala, P.; Makowski, D.; Goes, J.; Machowski, W.; Arriaran, S.S.. "Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques". 2019.
    10.23919/MIXDES.2019.8787142
  13. Póvoa, R.; Canelas, A.; Martins, R.; Horta, N.; Lourenço, N.; Goes, J.. "A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers". 2019.
    10.1109/SMACD.2019.8795248
  14. Correia, A.; Barquinha, P.; Marques, J.; Goe, J.. "A High-resolution ¿-Modulator ADC with Oversampling and Noise-shaping for IoT". 2018.
    10.1109/PRIME.2018.8430338
  15. Sniatala, P.; Kropidlowski, M.; Szczesny, S.; Goes, J.; Paulino, N.; Pedro Oliveira, J.. "Current Mode Sigma-Delta Modulators Designed for Amperometry Based Medical Sensors". 2018.
    10.1109/ICSES.2018.8507330
  16. Keragodu, T.; Tiwari, B.; Nishtha; Bahubalindruni, P.; Goes, J.; Barquinha, P.. "A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors". 2018.
    10.1109/ISCAS.2018.8351175
  17. Ferreira, B.; Fernades, M.; Oliveira, L.; Goes, J.. "Impact of VCO non-linearities on VCO-based sigma-delta modulator ADCs". 2018.
    10.1109/YEF-ECE.2018.8368946
  18. Póvoa, R.; Canelas, A.; Martins, R.; Lourenço, N.; Horta, N.; Goes, J.. "A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits". 2017.
    10.1109/PRIME.2017.7974122
  19. Singh, S.; Bahubalindruni, P.; Goes, J.. "A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs". 2017.
    10.1109/ISCAS.2017.8050490
  20. Pereira, N.; Serra, H.; Goes, J.. "A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC". 2017.
    10.1109/ISCAS.2017.8050563
  21. Nowacki, B.; Paulino, N.; Goes, J.. "A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ?SM". 2016.
    10.1109/ISSCC.2016.7418013
  22. Fernandes, M.D.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.. "Design of a low phase error multiphase clock generator for modern wideband receivers". 2016.
    10.1109/PRIME.2016.7519504
  23. Bahubalindruni, P.G.; Goes, J.; Barquinha, P.. "A high-gain, high-speed parametric residue amplifier for SAR-assisted pipeline ADCs". 2016.
    10.1109/SMACD.2016.7520732
  24. Sniatala, P.; Handkiewicz, A.; Goes, J.; Paulino, N.; Oliveira, J.P.. "Fully differential sigma-delta modulator structure for current-mode sensors". 2016.
    10.1109/ICSES.2016.7593816
  25. Fernandes, M.D.; Oliveira, L.B.; Goes, J.. "Wideband noise cancelling balun LNA with feedback biasing". 2016.
    10.1109/ISCAS.2016.7527226
  26. Oliveira, J.P.; Goes, J.. "Advanced amplification techniques for nanoscale CMOS in the context of IoT node sensors". 2016.
    10.1109/MIXDES.2016.7529692
  27. Póvoa, R.; Lourenço, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner". 2015.
    10.1109/ICECS.2014.7049972
  28. Pereira, N.; Goes, J.; Rodrigues, M.; Faria, P.. "A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance". 2015.
    10.1109/ICECS.2014.7050000
  29. Correia, A.; Martins, R.; Fortunato, E.; Barquinha, P.; Goes, J.. "Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors". 2015.
    10.1109/ISCAS.2015.7168620
  30. Abdollahvand, S.; Paulino, N.; Gomes, L.; Goes, J.. "A current-mode VCO-based amplifier-less 2nd-order ¿S modulator with over 85dB SNDR". 2015.
    10.1109/ISCAS.2015.7169077
  31. De Melo, J.L.A.; Goes, J.; Paulino, N.. "A 0.7 v 256 µw ¿S modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW". 2015.
    10.1109/VLSIC.2015.7231294
  32. Povoa, R.; Lourenco, N.; Horta, N.; Goes, J.. "A voltage-combiners-biased amplifier with enhanced gain and speed using current starving". 2015.
    10.1109/ISCAS.2015.7169085
  33. Goes, J.; Häfliger, P.. "Technical Program Co-Chairs Message". 2015.
    10.1109/ISCAS.2015.7168555
  34. Abdollahvand, S.; Oliveira, L.B.; Gomes, L.; Goes, J.. "A low-voltage voltage-controlled ring-oscillator employing dynamic-threshold-MOS and body-biasing techniques". 2015.
    10.1109/ISCAS.2015.7168878
  35. Serra, H.; Santos-Tavares, R.; Goes, J.. "Automatic design of high-order SC filter circuits". 2015.
    10.1109/ISCAS.2015.7169052
  36. De Melo, J.L.A.; Leitao, P.V.; Goes, J.; Paulino, N.. "A simple clab-D audio power amplifier using a pabive CT S¿ modulator for medium quality sound systems". 2015.
    10.1109/MIXDES.2015.7208582
  37. Pereira, N.; Goes, J.; Oliveira, L.B.; Dinis, R.. "Analog-to-Digital Converters with embedded if mixing using variable reference voltages". 2014.
    10.1109/ISCAS.2014.6865072
  38. De Melo, J.L.A.; Querido, F.; Paulino, N.; Goes, J.. "A 0.4-V 410-nW opamp-less continuous-time S¿ modulator for biomedical applications". 2014.
    10.1109/ISCAS.2014.6865391
  39. Sniatala, P.; Naumowicz, M.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "A hybrid current-mode passive second-order continuous-time S¿ modulator". 2014.
    10.1109/MIXDES.2014.6872168
  40. Nowacki, B.; Paulino, N.; Goes, J.. "A low power 4th order MASH switched-capacitor S¿ modulator using ultra incomplete settling". 2014.
    10.1109/ISCAS.2014.6865392
  41. Povoa, R.; Lourenco, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners". 2013.
    10.1109/VLSI-SoC.2013.6673238
  42. Vaz, B.; Goes, J.; Paulino, N.; Steiger-Garcao, A.. "Design of a 1.8V, 10-bit 130+MS/S time-interleaved non-scaled pipeline adc in 0.18 µm cmos". 2005.
  43. Galhardo, A.; Goes, J.; Vaz, B.; Paulino, N.. "Design of low-voltage low-power pipeline adcs using a single-phase scheme". 2005.
  44. Evans, G.; Goes, João; Unterweissacher, M; Paulino, Nuno. "1.5 V CMOS Gaussian and uniform noise generators for BISC/BIST of ADCs". Trabalho apresentado em AVLSIWS 2005 ¿ IEEJ International Analog VLSI Workshop, Bordeaux, 2005.
    Publicado
  45. Unterweissacher, M; Goes, João; Evans, G.. "A low voltage CMOS Gaussian noise generator". Trabalho apresentado em Austrochip 2003 Conference, Linz, 2003.
    Publicado
  46. Goes, J.; Vital, J.C.; Alves, L.; Ferreira, N.; Ventura, P.; Bach, E.; Franca, J.E.; Koch, R.. "A low-power 14-b 5 MS/s CMOS pipeline ADC with background analog self-calibration". 2000.
Artigo em revista
  1. Houda Harkat; Luis M. Camarinha-Matos; João Goes; Hasmath F.T. Ahmed. "Cyber-physical systems security: A systematic review". Computers & Industrial Engineering (2024): https://doi.org/10.1016/j.cie.2024.109891.
    10.1016/j.cie.2024.109891
  2. João Goes; José de la Rosa; Andreia Cathelin; Jorge Fernandes; João Oliveira; Luís Bica de Oliveira; Nuno Paulino. "IEEE SSCS–EDS ESSCIRC–ESSDERC 2023 [Conference Reports]". IEEE Solid-State Circuits Magazine (2024): https://doi.org/10.1109/MSSC.2023.3332272.
    10.1109/MSSC.2023.3332272
  3. Ana Correia; Vítor Grade Tavares; Pedro Barquinha; João Goes. "All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications". Journal of Low Power Electronics and Applications (2022): https://doi.org/10.3390/jlpea12040064.
    10.3390/jlpea12040064
  4. Tavares, Miguel; Gerald, José; Goes, João. "Zoom discrete spectral correlation function, with application to cyclostationary signal detection". Digital Signal Processing 121 (2022): 103316. http://dx.doi.org/10.1016/j.dsp.2021.103316.
    10.1016/j.dsp.2021.103316
  5. Fonte, P.J.R.; Martinho, A.; Pereira, A.; Gomes, A.; Neves, Â.; Abrunhosa, A.; Bugalho, A.; et al. "Robust, maintainable, emergency invasive mechanical ventilator". Revista Brasileira de Terapia Intensiva 34 3 (2022): 351-359. http://www.scopus.com/inward/record.url?eid=2-s2.0-85141509993&partnerID=MN8TOARS.
    10.5935/0103-507X.20220383-en
  6. Shrivastava, S.; Bahubalindruni, P.G.; Goes, J.. "A Pulse Width Modulator Using a High-Speed Comparator with Flexible Oxide TFT Technology". IEEE Solid-State Circuits Letters 5 (2022): 288-291. http://www.scopus.com/inward/record.url?eid=2-s2.0-85144751412&partnerID=MN8TOARS.
    10.1109/LSSC.2022.3228072
  7. Paulo J. R. Fonte; Alberto Martinho; Américo Pereira; Andreia Gomes; Ângela Neves; Antero Abrunhosa; António Bugalho; et al. "Ventilador mecânico invasivo de emergência resistente e de fácil manutenção". Revista Brasileira de Terapia Intensiva 34 3 (2022): http://dx.doi.org/10.5935/0103-507x.20220383-pt.
    10.5935/0103-507x.20220383-pt
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  70. Goes, J.; Paulino, N.; Figueiredo, M.; Santin, E.; Rodrigues, M.; Faria, P.; Vaz, B.; Monteiro, R.. "Purely-digital versus mixed-signal self-calibration techniques in high-resolution pipeline ADCs". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751529222&partnerID=MN8TOARS.
    10.1109/NORCHIP.2010.5669424
  71. Custódio, J.R.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.; Bruun, E.; Andreani, P.. "A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751553142&partnerID=MN8TOARS.
    10.1109/NORCHIP.2010.5669429
  72. Figueiredo, M.; Michalak, T.; Goes, J.; Gomes, L.; Sniatala, P.. "Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits". 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009 (2009): 763-766. http://www.scopus.com/inward/record.url?eid=2-s2.0-77951432156&partnerID=MN8TOARS.
    10.1109/ICECS.2009.5410771
  73. Gama, R.; Galhardo, A.; Goes, J.; Paulino, N.; Neves, R.; Horta, N.. "Design of a low-power, open loop, multiply-by-two amplifier with gain-accuracy improved by local-feedback". Proceedings of the 16th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2009 (2009): 248-251. http://www.scopus.com/inward/record.url?eid=2-s2.0-72149110321&partnerID=MN8TOARS.
  74. Esperança, B.; Goes, J.; Tavares, R.; Galhardo, A.; Paulino, N.; Medeiros Silva, M.. "Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 220-223. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749094634&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541394
  75. Galhardo, A.; Goes, J.; Paulino, N.. "Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2258-2261. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086355&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541903
  76. Figueiredo, M.; Paulino, N.; Evans, G.; Goes, J.. "New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 232-235. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086144&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541397
  77. Santos-Tavares, R.; Paulino, N.; Higino, J.; Goes, J.; Oliveira, J.P.. "Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 724-727. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749112891&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541520
  78. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "A multiplying-by-two CMOS amplfifier for high-speed ADCS based on parametric amplification". Proceedings of The 15th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2008 (2008): 177-180. http://www.scopus.com/inward/record.url?eid=2-s2.0-56349171251&partnerID=MN8TOARS.
  79. Custódio, J.R.; Paulino, N.; Goes, J.; Bruun, E.. "Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 1107-1110. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849140303&partnerID=MN8TOARS.
    10.1109/ICECS.2008.4675051
  80. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 251-254. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849087451&partnerID=MN8TOARS.
    10.1109/ICECS.2008.4674838
  81. Paulino, N.; Goes, J.; Steiger-Garção, A.. "A CMOS variable width short-pulse generator circuit for UWB radar applications". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2713-2716. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749118458&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4542017
  82. Goes, J.; Pereira, J.C.; Paulino, N.; Silva, M.M.. "Switched-capacitor multiply-by-two amplifier insensitive to component mismatches". IEEE Transactions on Circuits and Systems II: Express Briefs 54 1 (2007): 29-33. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847671350&partnerID=MN8TOARS.
    10.1109/TCSII.2006.884123
  83. Oliveira, J.P.; Goes, J.; Esperança, B.; Paulino, N.; Fernandes, J.. "Low-power CMOS comparator with embedded amplification for ultra-high-speed ADCs". Proceedings - IEEE International Symposium on Circuits and Systems (2007): 3602-3605. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548858984&partnerID=MN8TOARS.
  84. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2007): 218-221. http://www.scopus.com/inward/record.url?eid=2-s2.0-50649095466&partnerID=MN8TOARS.
    10.1109/ICECS.2007.4510969
  85. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.. "Improved low-power low-voltage CMOS comparator for 4-bit flash ADCS for UWB applications". Proceedings of the 14th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2007 (2007): 293-296. http://www.scopus.com/inward/record.url?eid=2-s2.0-47749152264&partnerID=MN8TOARS.
    10.1109/MIXDES.2007.4286170
  86. Goes, J.; Vaz, B.; Monteiro, R.; Paulino, N.. "A 0.9V ¿S modulator with 80dB SNDR and 83dB DR using a single-phase technique". Digest of Technical Papers - IEEE International Solid-State Circuits Conference (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33847745487&partnerID=MN8TOARS.
  87. Galhardo, A.; Goes, J.; Paulino, N.. "Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability". Proceedings - IEEE International Symposium on Circuits and Systems (2006): 2001-2004. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847618539&partnerID=MN8TOARS.
  88. Santos-Tavares, R.; Paulino, N.; Goes, J.; Oliveira, J.P.. "Optimum sizing and compensation of two-stage CMOS amplifiers based on a time-domain approach". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2006): 533-536. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349126139&partnerID=MN8TOARS.
    10.1109/ICECS.2006.379843
  89. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using a 1.5 v CMOS Gaussian noise generator". 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (2006): 669-672. http://www.scopus.com/inward/record.url?eid=2-s2.0-43549094267&partnerID=MN8TOARS.
    10.1109/EDSSC.2005.1635363
  90. Vaz, B.; Goes, J.; Piloto, R.; Neto, J.; Monteiro, R.; Paulino, N.. "A Low-Voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 4074-4077. http://www.scopus.com/inward/record.url?eid=2-s2.0-33845733892&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1465526
  91. Goes, J.; Vaz, B.; Paulino, N.; Pinto, H.; Monteiro, R.; Garção, A.S.. "Switched-capacitor circuits using a single-phase scheme". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 3123-3126. http://www.scopus.com/inward/record.url?eid=2-s2.0-39749155470&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1465289
  92. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 796-799. http://www.scopus.com/inward/record.url?eid=2-s2.0-39749149536&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1464708
  93. Goes, J.; Paulino, N.; Pinto, H.; Monteiro, R.; Vaz, B.; Garção, A.S.. "Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme". IEEE Transactions on Circuits and Systems I: Regular Papers 52 12 (2005): 2595-2604. http://www.scopus.com/inward/record.url?eid=2-s2.0-29344466938&partnerID=MN8TOARS.
    10.1109/TCSI.2005.857552
  94. Vaz, B.; Goes, J.; Paulino, N.. "A 1.5-V 10-b 50 MS/s time-interleaved switched-opamp pipeline CMOS ADC with high energy efficiency". IEEE Symposium on VLSI Circuits, Digest of Technical Papers CIRCUITS S (2004): 432-435. http://www.scopus.com/inward/record.url?eid=2-s2.0-4544256283&partnerID=MN8TOARS.
  95. Goes, J.; Pinto, H.; Monteiro, R.; Paulino, N.; Vaz, B.; AS-Garção. "Low power low-voltage CMOS A/D switched-opamp ~A modulator for bio-potential signals using a single-phase scheme". 2004 IEEE International Workshop on Biomedical Circuits and Systems (2004): http://www.scopus.com/inward/record.url?eid=2-s2.0-28244496132&partnerID=MN8TOARS.
  96. Unterweissacher, M.; Goes, J.; Paulino, N.; Evans, G.; Ortigueira, M.D.. "Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038489138&partnerID=MN8TOARS.
  97. Tavares, R.; Vaz, B.; Goes, J.; Paulina, N.; Steiger-Garção, A.. "Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038496823&partnerID=MN8TOARS.
  98. Paulina, N.; Serrazina, M.; Goes, J.; Steiger-Garção, A.. "Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158224&partnerID=MN8TOARS.
  99. Evans, G.; Goes, J.; Steiger-Garção, A.; Ortigueira, M.D.; Paulino, N.; Sousa Lopes, J.. "Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158222&partnerID=MN8TOARS.
  100. Vaz, B.; Paulino, N.; Goes, J.; Costa, R.; Tavares, R.; Steiger-Garção, A.. "Design of low-voltage CMOS pipelined ADC's using 1 pico-Joule of energy per conversion". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292221&partnerID=MN8TOARS.
  101. Paulino, N.; Rebelo, H.; Pires, F.; Ventim Neves, I.; Goes, J.; Steiger-Garção, A.. "Design of a spiral-mode microstrip antenna and matching circuitry for ultra-wide-band receivers". Proceedings - IEEE International Symposium on Circuits and Systems 3 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292921&partnerID=MN8TOARS.
  102. Amaral, P.; Goes, J.; Paulino, N.; Steiger-Garção, A.. "An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036297264&partnerID=MN8TOARS.
  103. Goes, J.; Paulino, N.; Ortigueira, M.D.. "Digital-domain self-calibration technique for video-rate pipeline A/D converters using Gaussian white noise". Electronics Letters 38 19 (2002): 1100-1101. http://www.scopus.com/inward/record.url?eid=2-s2.0-0037068726&partnerID=MN8TOARS.
    10.1049/el:20020731
  104. Paulino, N.; Goes, J.; Steiger-Garção, A.. "Design methodology for optimization of analog building blocks using genetic algorithms". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2001): 435-438. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035019603&partnerID=MN8TOARS.
  105. Vaz, B.; Costa, R.; Paulino, N.; Goes, J.; Tavares, R.; Steiger-Garção, A.. "A general-purpose kernel based on genetic algorithms for optimization of complex analog circuits". Midwest Symposium on Circuits and Systems 1 (2001): 83-86. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035574034&partnerID=MN8TOARS.
  106. Horta, N.; Fino, M.; Goes, J.. "Symbolic techniques applied to switched-current ADCs synthesis". Proceedings - IEEE International Symposium on Circuits and Systems 3 (2000): http://www.scopus.com/inward/record.url?eid=2-s2.0-0033698138&partnerID=MN8TOARS.
  107. Goes, J.; Vital, J.C.; Franca, J.E.. "Systematic design for optimization of high-speed self-calibrated pipelined A/D converters". IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45 12 (1998): 1513-1526. http://www.scopus.com/inward/record.url?eid=2-s2.0-0032259908&partnerID=MN8TOARS.
    10.1109/82.746663
  108. Goes, J.; Vital, J.C.; Franca, J.E.. "CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters". Proceedings of the Custom Integrated Circuits Conference (1996): 105-108. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029701107&partnerID=MN8TOARS.
  109. Goes, Joao; Vital, Joao C.; Franca, Jose E.. "Optimum resolution-per-stage in high-speed pipelined A/D converters using self-calibration". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1995): 525-528. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029191729&partnerID=MN8TOARS.
  110. Goes, J.; Vital, J.C.; Franca, J.E.. "Analogue self-calibration technique for high-resolution video-rate pipelined A/D converters". Midwest Symposium on Circuits and Systems 2 (1995): 740-743. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029457797&partnerID=MN8TOARS.
  111. Vital, J.C.; Horta, N.C.; Silva, N.S.; Franca, N.E.; Goes, J.; Lanca, M.A.; Franca, J.E.. "Automatic synthesis of modular data conversion architectures and functional building blocks". IEE Conference Publication 393 (1994): 102-109. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028018726&partnerID=MN8TOARS.
  112. Goes, J.; Franca, J.; Paulino, N.; Grilo, J.; Temes, G.. "High-linearity calibration of low-resolution digital-to-analog converters". Proceedings - IEEE International Symposium on Circuits and Systems 5 (1994): 345-348. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028572582&partnerID=MN8TOARS.
Capítulo de livro
  1. Paulino, N.; Garção, A.S.; Goes, J.. "UWB Signals and Systems". 5-47. 2008.
    10.1007/978-1-4020-8410-2_2
  2. Paulino, N.; Garção, A.S.; Goes, J.. "Introduction". 1-3. 2008.
    10.1007/978-1-4020-8410-2_1
  3. Paulino, N.; Garção, A.S.; Goes, J.. "Digitally Programmable Delay". 115-166. 2008.
    10.1007/978-1-4020-8410-2_4
  4. Paulino, N.; Garção, A.S.; Goes, J.. "UWB RADAR Receiver Architecture". 49-114. 2008.
    10.1007/978-1-4020-8410-2_3
  5. Paulino, N.; Garção, A.S.; Goes, J.. "Transceiver Prototype and Experimental Results". 167-209. 2008.
    10.1007/978-1-4020-8410-2_5
  6. Paulino, N.; Garção, A.S.; Goes, J.. "Conclusions". 211-213. 2008.
    10.1007/978-1-4020-8410-2_6
Livro
  1. Xavier, J.; Barquinha, P.; Goes, J.. Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology. 2023.
    10.1007/978-3-031-36007-7_21
  2. Leonardo, D.; Goes, J.. An Energy-Efficient Wideband Input-Buffer for High-Speed CMOS ADCs. 2022.
    10.1007/978-3-031-07520-9_18
  3. Campilho-Gomes, M.; Tavares, R.; Goes, J.. Automatic Flat-Level Circuit Generation with Genetic Algorithms. 2020.
    10.1007/978-3-030-45124-0_9
  4. Póvoa, R.F.S.; da Palma Goes, J.C.; Horta, N.C.G.. A new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain. 2018.
    10.1007/978-3-319-95207-9
  5. Teixeira, M.L.; Velez, C.; Li, D.; Goes, J.. Microneedle based ECG – Glucose painless MEMS sensor with analog front end for portable devices. 2017.
    10.1007/978-3-319-56077-9_45
  6. Correia, A.; Goes, J.; Barquinha, P.. Oxide TFTs on flexible substrates for designing and fabricating analog-to-digital converters. 2016.
    10.1007/978-3-319-31165-4_50
  7. Martins, J.; Barquinha, P.; Goes, J.. TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors. 2016.
    10.1007/978-3-319-31165-4_52
  8. Martins, J.; Camarinha-Matos, L.M.; Goes, J.; Gomes, L.. Towards cloud-based engineering systems. 2015.
    10.1007/978-3-319-16766-4_1
  9. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Towards Collective Awareness Systems. 2014.
    10.1007/978-3-642-54734-1
  10. Correia, J.; Mancelos, N.; Goes, J.. Stability Improvements in a Rail-to-Rail Input/Output, Constant Gm Operational Amplifier, at 0.4 V Operation, Using the Low-Voltage DTMOS Technique. 2014.
    10.1007/978-3-642-54734-8_65
  11. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Contributing to the internet of things. 2013.
  12. Serra, H.; Paulino, N.; Goes, J.. A switched-capacitor band-pass biquad filter using a simple quasi-unity gain amplifier. 2013.
  13. Abdollahv, S.; Santos-Tavares, R.; Goes, J.. A low-voltage CMOS buffer for RF applications based on a fully-differential voltage-combiner. 2013.
  14. Bastos, I.; Querido, F.; Amoêdo, D.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. A 1.2 v low-noise-amplifier with double feedback for high gain and low noise figure. 2013.
  15. Figueiredo, M.; Goes, J.; Evans, G.. Reference-Free CMOS Pipeline Analog-to-Digital Converters. 2013.
    10.1007/978-1-4614-3467-2
  16. Pereira, N.; Oliveira, L.B.; Goes, J.. Design of cascode-based transconductance amplifiers with low-gain pvt variability and gain enhancement using a body-biasing technique. 2013.
  17. Oliveira, J.P.; Goes, J.. Parametric analog signal amplification applied to nanoscale CMOS technologies. 2012.
    10.1007/978-1-4614-1671-5

Propriedade Intelectual

Patente
  1. Paulino, N.; Ortigueira, MD; Unterweissacher, M; Evans, G.; Goes, João. 2006. "Digital-Domain Self-Calibration and Built-in Self-Testing Techniques for High-Speed Integrated A/D Converters Using White Gaussian Noise".

Outros

Outra produção
  1. Prototype of an affordable pressure-controlled emergency mechanical ventilator for COVID-19. 2020. Pereira, A.; Lopes, L.; Fonte, P.; Póvoa, P.; Santos, T.G.; Martinho, A.; Neves, Â.; et al. http://www.scopus.com/inward/record.url?eid=2-s2.0-85181590807&partnerID=MN8TOARS.
    10.48550/arxiv.2004.00310
  2. IEEE-CAS4IIoT: 2nd seasonal school in circuits and systems for the industrial internet of things. 2019. Goes, J.; Oliveira, J.P.; Oliveira, L.. http://www.scopus.com/inward/record.url?eid=2-s2.0-85090881415&partnerID=MN8TOARS.
    10.1109/MSSC.2019.2920559
Atividades

Orientação

Título / Tema
Papel desempenhado
Curso (Tipo)
Instituição / Organização
2018/01/01 - 2022/03/01 An Energy-Efficient Hybrid DAC based SAR ADC using Deep-submicron CMOS and Large-Area Oxide TFT Technologies
Coorientador de Bhawna Tiwari
Electronics (Doutoramento)
Indraprastha Institute of Information Technology Delhi, Índia
2016/03/01 - 2021/01/24 TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors
Coorientador
Electronics (Doutoramento)
Universidade Nova de Lisboa, Portugal
2014/01/01 - 2021/01/19 Design of High-performance Low-noise and Low-power Digital CMOS Circuitry for Mixed-Signal Systems Integrating Asynchronous Architectures and Employing Self-Biased Logic
Orientador
Doctoral Program in Electrical and Computer Engineering (Doutoramento)
Universidade Nova de Lisboa, Portugal
2015/01/01 - 2019/12/19 Analog-to-Digital Converters with embedded IF mixing using variable reference voltages
Orientador
Electronics (Doutoramento)
Universidade Nova de Lisboa, Portugal
2014 - 2018 A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Gain Improvement
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011 - 2017/12/18 Sigma-Delta Modulators with Passive RC Integrators: Theory, Design Methodology for Optimization and Silicon Results
Coorientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2011 - 2016/05/11 Design of sigma-delta modulators for analog-to-digital conversion intensively using passive circuits
Coorientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/17 Design of analog-to-digital converters with embedded mixing for ultra-low-power radio receivers
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/16 A Built-in self-test technique for high speed analog-to-digital converters
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2008 - 2011/12/21 Ultra-Low Power-and-Area CMOS RF and Baseband Circuits for Biomedical
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2005 - 2010/12/22 Conversão Analógo-digital de Elevada Velocidade para Receptores Digitais Ultra-wideband
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2006 - 2010/12/20 Metodologias e Ferramentas para o Desenho de Circuitos Electrónicos Analógicos Assistidos por Computador
Coorientador
Engenharia Electrotécnica (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2003 - 2008/11 Novel Techniques for the Design and Practical Realization of Switched-capacitor Circuits in Deep-submicron Cmos Technologies
Orientador
Engenharia Electrotécnica (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2004 - 2008 Reference-Free High-Speed CMOS Pipeline Analog-to-Digital Converters
Orientador
Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2001 - 2006 Geradores de Ruído Branco Gaussiano e Uniforme para a Realização de Teste e Calibração Automática de Adc´s em Circuitos Integrados Cmos
Orientador
Física (Doutoramento)
Universidade de Lisboa, Portugal
2001 - 2005 Conversores Analógico/digital de Elevada Velocidade e Tensão de Alimentação Reduzida
Orientador
Engenharia Electrotécnica (Doutoramento)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Distinções

Prémio

2017 Best Teacher Award in Electrical and Computer Engineering 2016/2017
Faculdade de Ciencias e Tecnologia da Universidade NOVA de Lisboa, Portugal
2016 Prémio Inovação INCM 2016, “Papel Secreto – uma abordagem inovadora e de baixo custo”
Imprensa Nacional Casa da Moeda (INCM), Portugal
2012 2012 IEEE CASS Outstanding Young Author Award
IEEE Circuits and Systems Society, Estados Unidos