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João Goes graduated from Instituto Superior Técnico (IST), Lisbon, in Electrical and Computer Engineering (ECE), in 1992. He obtained the M.Sc. and the Ph.D. degrees in ECE, respectively, in 1996 and 2000, from the Technical University of Lisbon and the Habilitation degree, in Electronics, in 2012 from the NOVA University of Lisbon (NOVA). João Goes has been with the Department of Electrical and Computer Engineering (DEEC) of the School of Science and Technology (FCT) at NOVA, since April 1998, where he is currently a Full Professor. From July 2012 till December 2019, he was heading the Department. From 1998, he has been a Senior Researcher at the Centre for Technology and Systems (CTS) at UNINOVA Institute and he has been responsible for the micro and nano-electronics Research Unit. From November 2012 to December 2017, João Goes was the Director of CTS comprising nearly 50 integrated members, over 70 Collaborators (holding a PhD degree) and more than 80 PhD students. In Sep. 2003 he co-founded and served, for 4 years, as the CTO (and Board member) of ACACIA Semiconductor SA, a Portuguese engineering company specialized in high-performance data converter and analog front-end products (acquired by Silicon and Software Systems, S3, in Oct. 2007, now DIALOG/RENESSAS). Since Nov. 2007 he does his lectures and carry out his research activities with part-time consultancy work. From March 1997 until March 1998 he was Project Manager at CHIPIDEA SA (now SYNOPSYS). João Goes was the first Engineer hired. From December 1993 to February 1997 he worked as a Senior Researcher at Integrated Circuits and Systems Group (GCSI) at IST doing research on data converters and analog filters. Since 1992 he has participated and led several National and European projects in science, technology, networking and training. He has been the Primary Investigator of over 20 projects. João Goes has supervised (concluded) 18 Ph.D. and 50 M.Sc. Theses. He has published over 200 papers in international journals (50+) and leading IEEE leading conferences (ISSCC, VLSI, CICC and ESSCIRC), he holds 3 international patents and he is co-author of 8 books and several chapters in both, scientific and educational editions. João Goes is Senior Member of IEEE since 2009 (Member since 1995) and Member of the Circuits and Systems (CASS) and Solid-State Circuits (SSCS) Societies. He was the Chairman of the IEEE CASS Analog Signal Processing Technical Committee, ASPTC, respectively, for the term 2013-2015. He has been serving as Program co-Chairman, Organization co-Chairman and Technical Program Committee (TPC) Member for numerous conferences, such as, ISCAS (IEEE), PRIME (IEEE) IMSTW, AMICSA (ESA) and DoCEIS (DEEC/FCT/UNL). He was the TPC co-Chairman of IEEE ISCAS 2015, held in Lisbon, in 24-27 May 2015, and he was also the TPC co-Chairman of PRIME'2016. He is currently the Vice-Chairman of IEEE ESSCIRC/ESSDERC'2022 and will be the General Chairman of IEEE ESSCIRC/ESSDERC'2023, to be held in Lisbon, in September 2023. João Goes is co-author of the journal paper recipient of the 2012 IEEE CASS Outstanding Young Author Award, co-winner (1st place) of the first edition of the, INCM Innovation Award, in 2016 and he has been Associate Editor of IEEE Transactions on Circuits and Systems - Express-Briefs, from 2016 until 2024.
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Identification

Personal identification

Full name
João Carlos da Palma Goes

Citation names

  • Goes, João

Author identifiers

Ciência ID
3E1C-5E04-30D5
ORCID iD
0000-0002-8434-8391

Telephones

Mobile phone
  • 962686117 (Personal)

Addresses

  • Rua Vicente Dias, no. 12, 3º-D, 1400-358, Lisbon, Lisbon, Portugal (Personal)

Websites

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Electrical and Electronic Engineering

Languages

Language Speaking Reading Writing Listening Peer-review
Portuguese (Mother tongue)
English Proficiency (C2) Proficiency (C2) Proficiency (C2) Proficiency (C2) Proficiency (C2)
Italian Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2)
Education
Degree Classification
2012
Concluded
 Ciências de Engenharia Electrotécnica e de Computadores (Título de Agregado)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
 Approved
2000
Concluded
 Engenharia Electrotécnica e de Computadores (Doutoramento)
Major in Electrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Optimization of Self-calibrated Cmos Pipelined Analogue-to-digital Converters" (THESIS/DISSERTATION)
 Approved
Affiliation

Teaching in Higher Education

Category
Host institution 		Employer
2018/01/01 - Current Full Professor (University Teacher) Universidade Nova de Lisboa, Portugal
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2017 - 2018 Associate Professor (University Teacher) Universidade Nova de Lisboa, Portugal
2013 - 2016 Associate Professor (University Teacher) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal

Positions / Appointments

Category
Host institution 		Employer
2013 - 2019/12 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2017 - 2018 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa, Portugal
2013 - 2014 Conselho científico/técnico-científico ou orgão correspondente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Projects

Contract

Designation Funders
2020/04/01 - 2022/03/31 Blind Calibration of SAR-Assisted Time-Interleaved Pipeline ADCs using Advanced Machine-Learning Techniques
XILINX - 2
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Xilinx Inc
Ongoing
2019/02/01 - 2022/01/31 Data fusion of sensor networks and fire spread modelling for decision support in forest fire suppression.
PCIF/SSI/0102/2017
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Universidade de Aveiro, Portugal

Universidade Nova de Lisboa, Portugal

Universidade de Lisboa Instituto Superior de Agronomia, Portugal

Instituto de Telecomunicações, Portugal

Direção-Geral do Território, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2014 - 2017 INPACtOR - The future INterconnected Physical And Cyber wORlds
UID/EEA/00066/2014
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2013/04/01 - 2016/12/31 A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems.
EXCL/EEI-ELC/0261/2012
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto de Telecomunicações, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2010 - 2012 IMPACT - Inovações em amplificação paramétrica aplicada a circuitos integrados CMOS
PTDC/EEA-ELC/101421/2008
PTDC/EEA-ELC/101421/2008
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2007 - 2011 LEADER - Conversor Analógico-Digital de Baixa Energia com Resolução Efectiva Acrescida
PTDC/EEA-ELC/69791/2006
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2007 - 2010 High-Speed High-Resolution Radiation-Hardened ADC Technology
AO/1-4686/04/NL/HE
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 European Space Agency
Concluded
2005 - 2008 SIPHASE - PROJECTO DE CIRCUITOS EM CONDENSADORES COMUTADOS EM TECNOLOGIAS CMOS UTILIZANDO UMA ÚNICA FASE DE RELÓGIO
POSI/EEA-ESE/61863/2004
POSI/EEA-ESE/61863/2004
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2004 - 2006 SECA - Conversor A/D Concorrencial de Video, Auto-Calibrado, de Baixa Potência e de Baixa Tensão de Alimentação com Função de Auto-Teste
POCTI/ESE/47061/2002
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2002 - 2006 SAMBA - Módulo Inteligente de Interface Analógico-Digital para Aplicações Biomédicas
POCTI/ESE/41804/2001
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
Outputs

Publications

Book
  1. Póvoa, R.F.S.; da Palma Goes, J.C.; Horta, N.C.G.. A new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain. 2018.
    10.1007/978-3-319-95207-9
  2. Teixeira, M.L.; Velez, C.; Li, D.; Goes, J.. Microneedle based ECG – Glucose painless MEMS sensor with analog front end for portable devices. 2017.
    10.1007/978-3-319-56077-9_45
  3. Correia, A.; Goes, J.; Barquinha, P.. Oxide TFTs on flexible substrates for designing and fabricating analog-to-digital converters. 2016.
    10.1007/978-3-319-31165-4_50
  4. Martins, J.; Barquinha, P.; Goes, J.. TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors. 2016.
    10.1007/978-3-319-31165-4_52
  5. Martins, J.; Camarinha-Matos, L.M.; Goes, J.; Gomes, L.. Towards cloud-based engineering systems. 2015.
    10.1007/978-3-319-16766-4_1
  6. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Towards Collective Awareness Systems. 2014.
    10.1007/978-3-642-54734-1
  7. Correia, J.; Mancelos, N.; Goes, J.. Stability Improvements in a Rail-to-Rail Input/Output, Constant Gm Operational Amplifier, at 0.4 V Operation, Using the Low-Voltage DTMOS Technique. 2014.
    10.1007/978-3-642-54734-8_65
  8. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Contributing to the internet of things. 2013.
  9. Serra, H.; Paulino, N.; Goes, J.. A switched-capacitor band-pass biquad filter using a simple quasi-unity gain amplifier. 2013.
  10. Abdollahv, S.; Santos-Tavares, R.; Goes, J.. A low-voltage CMOS buffer for RF applications based on a fully-differential voltage-combiner. 2013.
  11. Bastos, I.; Querido, F.; Amoêdo, D.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. A 1.2 v low-noise-amplifier with double feedback for high gain and low noise figure. 2013.
  12. Figueiredo, M.; Goes, J.; Evans, G.. Reference-Free CMOS Pipeline Analog-to-Digital Converters. 2013.
    10.1007/978-1-4614-3467-2
  13. Pereira, N.; Oliveira, L.B.; Goes, J.. Design of cascode-based transconductance amplifiers with low-gain pvt variability and gain enhancement using a body-biasing technique. 2013.
  14. Oliveira, J.P.; Goes, J.. Parametric analog signal amplification applied to nanoscale CMOS technologies. 2012.
    10.1007/978-1-4614-1671-5
Conference paper
  1. Correia, Ana; Tavares, Vitor Grade; Barquinha, Pedro; Goes, Joao. "Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers". 2021.
    10.1109/dcis53048.2021.9666176
  2. Xavier, Joao; Barquinha, Pedro; Goes, Joao. "Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS". Vila do Conde, 2021.
    10.1109/dcis53048.2021.9666185
  3. Goes, Joao; Tardivel, Benjamin; de Melo, Joao; Marques, Joao. "A Temperature-Compensated Class-AB Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs". Paper presented in IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
    10.1109/iscas45731.2020.9180530
  4. Sniatala, P.; Makowski, D.; Goes, J.; Machowski, W.; Arriaran, S.S.. "Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques". 2019.
    10.23919/MIXDES.2019.8787142
  5. Póvoa, R.; Canelas, A.; Martins, R.; Horta, N.; Lourenço, N.; Goes, J.. "A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers". 2019.
    10.1109/SMACD.2019.8795248
  6. Correia, A.; Barquinha, P.; Marques, J.; Goe, J.. "A High-resolution ¿-Modulator ADC with Oversampling and Noise-shaping for IoT". 2018.
    10.1109/PRIME.2018.8430338
  7. Sniatala, P.; Kropidlowski, M.; Szczesny, S.; Goes, J.; Paulino, N.; Pedro Oliveira, J.. "Current Mode Sigma-Delta Modulators Designed for Amperometry Based Medical Sensors". 2018.
    10.1109/ICSES.2018.8507330
  8. Keragodu, T.; Tiwari, B.; Nishtha; Bahubalindruni, P.; Goes, J.; Barquinha, P.. "A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors". 2018.
    10.1109/ISCAS.2018.8351175
  9. Ferreira, B.; Fernades, M.; Oliveira, L.; Goes, J.. "Impact of VCO non-linearities on VCO-based sigma-delta modulator ADCs". 2018.
    10.1109/YEF-ECE.2018.8368946
  10. Póvoa, R.; Canelas, A.; Martins, R.; Lourenço, N.; Horta, N.; Goes, J.. "A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits". 2017.
    10.1109/PRIME.2017.7974122
  11. Singh, S.; Bahubalindruni, P.; Goes, J.. "A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs". 2017.
    10.1109/ISCAS.2017.8050490
  12. Pereira, N.; Serra, H.; Goes, J.. "A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC". 2017.
    10.1109/ISCAS.2017.8050563
  13. Nowacki, B.; Paulino, N.; Goes, J.. "A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ?SM". 2016.
    10.1109/ISSCC.2016.7418013
  14. Fernandes, M.D.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.. "Design of a low phase error multiphase clock generator for modern wideband receivers". 2016.
    10.1109/PRIME.2016.7519504
  15. Bahubalindruni, P.G.; Goes, J.; Barquinha, P.. "A high-gain, high-speed parametric residue amplifier for SAR-assisted pipeline ADCs". 2016.
    10.1109/SMACD.2016.7520732
  16. Sniatala, P.; Handkiewicz, A.; Goes, J.; Paulino, N.; Oliveira, J.P.. "Fully differential sigma-delta modulator structure for current-mode sensors". 2016.
    10.1109/ICSES.2016.7593816
  17. Fernandes, M.D.; Oliveira, L.B.; Goes, J.. "Wideband noise cancelling balun LNA with feedback biasing". 2016.
    10.1109/ISCAS.2016.7527226
  18. Oliveira, J.P.; Goes, J.. "Advanced amplification techniques for nanoscale CMOS in the context of IoT node sensors". 2016.
    10.1109/MIXDES.2016.7529692
  19. Póvoa, R.; Lourenço, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner". 2015.
    10.1109/ICECS.2014.7049972
  20. Pereira, N.; Goes, J.; Rodrigues, M.; Faria, P.. "A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance". 2015.
    10.1109/ICECS.2014.7050000
  21. Correia, A.; Martins, R.; Fortunato, E.; Barquinha, P.; Goes, J.. "Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors". 2015.
    10.1109/ISCAS.2015.7168620
  22. Abdollahvand, S.; Paulino, N.; Gomes, L.; Goes, J.. "A current-mode VCO-based amplifier-less 2nd-order ¿S modulator with over 85dB SNDR". 2015.
    10.1109/ISCAS.2015.7169077
  23. De Melo, J.L.A.; Goes, J.; Paulino, N.. "A 0.7 v 256 µw ¿S modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW". 2015.
    10.1109/VLSIC.2015.7231294
  24. Povoa, R.; Lourenco, N.; Horta, N.; Goes, J.. "A voltage-combiners-biased amplifier with enhanced gain and speed using current starving". 2015.
    10.1109/ISCAS.2015.7169085
  25. Goes, J.; Häfliger, P.. "Technical Program Co-Chairs Message". 2015.
    10.1109/ISCAS.2015.7168555
  26. Abdollahvand, S.; Oliveira, L.B.; Gomes, L.; Goes, J.. "A low-voltage voltage-controlled ring-oscillator employing dynamic-threshold-MOS and body-biasing techniques". 2015.
    10.1109/ISCAS.2015.7168878
  27. Serra, H.; Santos-Tavares, R.; Goes, J.. "Automatic design of high-order SC filter circuits". 2015.
    10.1109/ISCAS.2015.7169052
  28. De Melo, J.L.A.; Leitao, P.V.; Goes, J.; Paulino, N.. "A simple clab-D audio power amplifier using a pabive CT S¿ modulator for medium quality sound systems". 2015.
    10.1109/MIXDES.2015.7208582
  29. Pereira, N.; Goes, J.; Oliveira, L.B.; Dinis, R.. "Analog-to-Digital Converters with embedded if mixing using variable reference voltages". 2014.
    10.1109/ISCAS.2014.6865072
  30. De Melo, J.L.A.; Querido, F.; Paulino, N.; Goes, J.. "A 0.4-V 410-nW opamp-less continuous-time S¿ modulator for biomedical applications". 2014.
    10.1109/ISCAS.2014.6865391
  31. Sniatala, P.; Naumowicz, M.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "A hybrid current-mode passive second-order continuous-time S¿ modulator". 2014.
    10.1109/MIXDES.2014.6872168
  32. Nowacki, B.; Paulino, N.; Goes, J.. "A low power 4th order MASH switched-capacitor S¿ modulator using ultra incomplete settling". 2014.
    10.1109/ISCAS.2014.6865392
  33. Povoa, R.; Lourenco, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners". 2013.
    10.1109/VLSI-SoC.2013.6673238
  34. Goes, J.; Vital, J.C.; Alves, L.; Ferreira, N.; Ventura, P.; Bach, E.; Franca, J.E.; Koch, R.. "A low-power 14-b 5 MS/s CMOS pipeline ADC with background analog self-calibration". 2000.
Journal article
  1. Ana Correia; Vítor Grade Tavares; Pedro Barquinha; João Goes. "All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications". Journal of Low Power Electronics and Applications (2022): https://doi.org/10.3390/jlpea12040064.
    10.3390/jlpea12040064
  2. Tavares, Miguel; Gerald, José; Goes, João. "Zoom discrete spectral correlation function, with application to cyclostationary signal detection". Digital Signal Processing 121 (2022): 103316. http://dx.doi.org/10.1016/j.dsp.2021.103316.
    10.1016/j.dsp.2021.103316
  3. Francisco Sandro Rodrigues Holanda; Maria Hosana dos Santos; Janisson Batista de Jesus; Wadson De Menezes Santos; Edinaldo De Oliveira Alves Sena; Thiago Xavier Chagas; João Horácio Dantas Almeida de Goes; Luiz Diego Vidal Santos. "Sediment input from the São Francisco River bank, Northeast Brazil, under low discharge period". Investigaciones Geográficas (2021): https://doi.org/10.14350/rig.60244.
    10.14350/rig.60244
  4. Carlos Silva; Jorge Martins; Jonas Deuermeier; Maria Elias Pereira; Ana Rovisco; Pedro Barquinha; João Goes; et al. "Towards Sustainable Crossbar Artificial Synapses with Zinc-Tin Oxide". Electronic Materials (2021): https://doi.org/10.3390/electronicmat2020009.
    10.3390/electronicmat2020009
  5. Camarinha-Matos, Luis M.; Goes, João; Gomes, Luis; Pereira, Pedro. "Soft and Transferable Skills Acquisition through Organizing a Doctoral Conference". Education Sciences 10 9 (2020): 235. http://dx.doi.org/10.3390/educsci10090235.
    Published • 10.3390/educsci10090235
  6. Pereira, Nuno; Goes, João. "A charge-sharing analog-to-digital converter with embedded downconversion using a variable reference voltage". International Journal of Circuit Theory and Applications (2020): http://dx.doi.org/10.1002/cta.2793.
    10.1002/cta.2793
  7. Povoa, Ricardo; Lourenco, Nuno; Martins, Ricardo; Canelas, Antonio; Horta, Nuno; Goes, Joao. "A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. http://dx.doi.org/10.1109/tcsii.2019.2913083.
    10.1109/tcsii.2019.2913083
  8. Tiwari, B.; Bahubalindruni, P.G.; Goes, J.; Barquinha, P.. "Positive-negative DC-DC converter using amorphous-InGaZnO TFTs". International Journal of Circuit Theory and Applications 48 3 (2020): 394-405. http://www.scopus.com/inward/record.url?eid=2-s2.0-85078657350&partnerID=MN8TOARS.
    10.1002/cta.2743
  9. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.; Goes, J.. "A folded voltage-combiners biased amplifier for low voltage and high energy-efficiency applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. http://www.scopus.com/inward/record.url?eid=2-s2.0-85071531251&partnerID=MN8TOARS.
    10.1109/TCSII.2019.2913083
  10. Póvoa, R.; Canelas, A.; Martins, R.; Horta, N.; Lourenço, N.; Goes, J.. "A new family of CMOS inverter-based OTAs for biomedical and healthcare applications". Integration 71 (2020): 38-48. http://www.scopus.com/inward/record.url?eid=2-s2.0-85076903851&partnerID=MN8TOARS.
    10.1016/j.vlsi.2019.12.004
  11. Wadhwa, N.; Bahubalindruni, P.G.; Chapagai, K.; Goes, J.; Deb, S.; Barquinha, P.. "Sixth-order differential Sallen-and-Key switched capacitor LPF using a-IGZO TFTs". International Journal of Circuit Theory and Applications 47 1 (2019): 32-42. http://www.scopus.com/inward/record.url?eid=2-s2.0-85055495337&partnerID=MN8TOARS.
    10.1002/cta.2576
  12. De Melo, J.L.A.; Pereira, N.; Leitao, P.V.; Paulino, N.; Goes, J.. "A systematic design methodology for optimization of sigma-delta modulators based on an evolutionary algorithm". IEEE Transactions on Circuits and Systems I: Regular Papers 66 9 (2019): 3544-3556. http://www.scopus.com/inward/record.url?eid=2-s2.0-85072034094&partnerID=MN8TOARS.
    10.1109/TCSI.2019.2925292
  13. Tiwari, B.; Bahubalindruni, P.G.; Santa, A.; Martins, J.; Mittal, P.; Goes, J.; Martins, R.; Fortunato, E.; Barquinha, P.. "Oxide TFT Rectifiers on Flexible Substrates Operating at NFC Frequency Range". IEEE Journal of the Electron Devices Society 7 (2019): 329-334. http://www.scopus.com/inward/record.url?eid=2-s2.0-85062949611&partnerID=MN8TOARS.
    10.1109/JEDS.2019.2897642
  14. Santin, E.; Oliveira, L.B.; Goes, J.. "Built-in self test of high speed analog-to-digital converters". IEEE Instrumentation and Measurement Magazine 22 6 (2019): 4-10. http://www.scopus.com/inward/record.url?eid=2-s2.0-85075971603&partnerID=MN8TOARS.
    10.1109/MIM.2019.8917897
  15. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.C.G.; Goes, J.. "Single-Stage Amplifier Biased by Voltage Combiners with Gain and Energy-Efficiency Enhancement". IEEE Transactions on Circuits and Systems II: Express Briefs 65 3 (2018): 266-270. http://www.scopus.com/inward/record.url?eid=2-s2.0-85042791739&partnerID=MN8TOARS.
    10.1109/TCSII.2017.2686586
  16. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.; Goes, J.. "Single-Stage OTA Biased by Voltage-Combiners with Enhanced Performance Using Current Starving". IEEE Transactions on Circuits and Systems II: Express Briefs 65 11 (2018): 1599-1603. http://www.scopus.com/inward/record.url?eid=2-s2.0-85036507263&partnerID=MN8TOARS.
    10.1109/TCSII.2017.2777533
  17. De Melo, J.L.A.; Paulino, N.; Goes, J.. "Continuous-time delta-sigma modulators based on passive RC integrators". IEEE Transactions on Circuits and Systems I: Regular Papers 65 11 (2018): 3662-3674. http://www.scopus.com/inward/record.url?eid=2-s2.0-85052554347&partnerID=MN8TOARS.
    10.1109/TCSI.2018.2855649
  18. Nowacki, B.; Paulino, N.; Goes, J.. "A Third-Order MASH S ¿ Modulator Using Passive Integrators". IEEE Transactions on Circuits and Systems I: Regular Papers 64 11 (2017): 2871-2883. http://www.scopus.com/inward/record.url?eid=2-s2.0-85020080422&partnerID=MN8TOARS.
    10.1109/TCSI.2017.2704164
  19. Oliveira, L.B.; Paulino, N.; Oliveira, J.P.; Santos-Tavares, R.; Pereira, N.; Goes, J.. "Undergraduate electronics projects based on the design of an optical wireless audio transmission system". IEEE Transactions on Education 60 2 (2017): 105-111. http://www.scopus.com/inward/record.url?eid=2-s2.0-84981745011&partnerID=MN8TOARS.
    10.1109/TE.2016.2590999
  20. Samanta, S.; Tiwari, B.; Bahubalindruni, P.G.; Barquinha, P.; Goes, J.. "Threshold voltage extraction techniques adaptable from sub-micron CMOS to large-area oxide TFT technologies". International Journal of Circuit Theory and Applications 45 12 (2017): 2201-2210. http://www.scopus.com/inward/record.url?eid=2-s2.0-85017370067&partnerID=MN8TOARS.
    10.1002/cta.2340
  21. Horta, N.; Baschirotto, A.; Fernández, F.V.; Dundar, G.; Goes, J.; Fernandes, J.. "Introduction to the special issue on PRIME 2016 and SMACD 2016". Integration, the VLSI Journal 58 (2017): 411-412. http://www.scopus.com/inward/record.url?eid=2-s2.0-85020901652&partnerID=MN8TOARS.
    10.1016/j.vlsi.2017.03.015
  22. I. Bastos; L.B. Oliveira; J. Goes; J.P. Oliveira; M. Silva. "Noise canceling LNA with gain enhancement by using double feedback". Integration 52 (2016): 309-315. https://doi.org/10.1016/j.vlsi.2015.07.003.
    10.1016/j.vlsi.2015.07.003
  23. SniataLa, P.; Naumowicz, M.; Handkiewicz, A.; Szcz¿sny, S.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "Current mode sigma-delta modulator designed with the help of transistor's size optimization tool". Bulletin of the Polish Academy of Sciences: Technical Sciences 63 4 (2015): 919-922. http://www.scopus.com/inward/record.url?eid=2-s2.0-84962129203&partnerID=MN8TOARS.
    10.1515/bpasts-2015-0104
  24. Bastos, I.; Oliveira, L.B.; Goes, J.; Silva, M.. "A low power balun LNA with active loads for gain and noise figure optimization". Analog Integrated Circuits and Signal Processing 81 3 (2014): 693-702. http://www.scopus.com/inward/record.url?eid=2-s2.0-84914673490&partnerID=MN8TOARS.
    10.1007/s10470-014-0426-6
  25. Bastos, I.; Oliveira, L.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "Double feedforward 0.6 v LNA with high gain and low noise figure". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 235-238. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888872894&partnerID=MN8TOARS.
  26. Nowacki, B.; Paulino, N.; Goes, J.. "A simple 1 GHz non-overlapping two-phase clock generators for SC circuits". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 174-178. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888859678&partnerID=MN8TOARS.
  27. Custódio, J.R.; Goes, J.; Paulino, N.; Oliveira, J.P.; Bruun, E.. "A 1.2-V 165-µ W 0.29-mm2 multibit sigma-delta ADC for hearing aids using nonlinear DACs and with over 91 dB dynamic-range". IEEE Transactions on Biomedical Circuits and Systems 7 3 (2013): 376-385. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878319543&partnerID=MN8TOARS.
    10.1109/TBCAS.2012.2203819
  28. Figueiredo, M.; Santin, E.; Goes, J.; Evans, G.; Paulino, N.. "A reference-free 7-bit 500 MS/s pipeline ADC using current-mode reference shifting and quantizers with built-in thresholds". Analog Integrated Circuits and Signal Processing 75 1 (2013): 53-65. http://www.scopus.com/inward/record.url?eid=2-s2.0-84874941237&partnerID=MN8TOARS.
    10.1007/s10470-013-0030-1
  29. Custódio, J.R.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Pereira, P.; Goes, J.; Bruun, E.. "A 6.2 mW 0.024 mm2 fully-passive RF downconverter with 12 dB gain enhancement using MOS parametric amplification". Analog Integrated Circuits and Signal Processing 75 2 (2013): 299-304. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877876738&partnerID=MN8TOARS.
    10.1007/s10470-013-0049-3
  30. Serra, H.; Paulino, N.; Goes, J.. "A switched-capacitor biquad using a simple quasi-unity gain amplifier". Proceedings - IEEE International Symposium on Circuits and Systems (2013): 1841-1844. http://www.scopus.com/inward/record.url?eid=2-s2.0-84883388680&partnerID=MN8TOARS.
    10.1109/ISCAS.2013.6572223
  31. Santos-Tavares, R.; Santin, E.; Borrego, R.; Oliveira, J.; Goes, J.. "Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 247-250. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888874024&partnerID=MN8TOARS.
  32. Pereira, N.; Oliveira, L.B.; Goes, J.; Oliveira, J.. "Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 209-212. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888858803&partnerID=MN8TOARS.
  33. Borrego, R.; Oliveira, J.P.; Goes, J.. "A 2.3-dB NF CMOS low voltage LNA optimized for medical applications at 600MHz". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 575-579. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888870516&partnerID=MN8TOARS.
  34. Figueiredo, M.; Goes, J.; Oliveira, L.B.; Steiger-Garção, A.. "Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds". International Journal of Circuit Theory and Applications 40 7 (2012): 681-691. http://www.scopus.com/inward/record.url?eid=2-s2.0-84863722452&partnerID=MN8TOARS.
    10.1002/cta.750
  35. Abdollahvand, S.; Gomes, A.; Rodrigues, D.; Januário, F.; Goes, J.. "Design of robust CMOS amplifiers combining advanced low-voltage and feedback techniques". IFIP Advances in Information and Communication Technology 372 AICT (2012): 421-428. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862881956&partnerID=MN8TOARS.
    10.1007/978-3-642-28255-3_46
  36. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. "Raising awareness for value creation potential in engineering research". IFIP Advances in Information and Communication Technology 372 AICT (2012): 3-6. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862894066&partnerID=MN8TOARS.
    10.1007/978-3-642-28255-3_1
  37. Carvalho, J.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "A balun transimpedance amplifier with adjustable gain for integrated SPO 2 optic sensors". Proceedings of the 19th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2012 (2012): 178-182. http://www.scopus.com/inward/record.url?eid=2-s2.0-84864221123&partnerID=MN8TOARS.
  38. Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "Balun LNA with continuously controllable gain and with noise and distortion cancellation". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2143-2146. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866603384&partnerID=MN8TOARS.
    10.1109/ISCAS.2012.6271711
  39. Abdollahvand, S.; Goes, J.; Oliveira, L.B.; Gomes, L.; Paulino, N.. "Low phase-noise temperature compensated self-biased ring oscillator". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2489-2492. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866599632&partnerID=MN8TOARS.
    10.1109/ISCAS.2012.6271805
  40. Pacheco, J.; Figueiredo, M.; Paulino, N.; Goes, J.. "Current-mode reference shifting solution for MDAC-based analog-to-digital converters". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2989-2992. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866601865&partnerID=MN8TOARS.
    10.1109/ISCAS.2012.6271946
  41. De Melo, J.L.A.; Nowacki, B.; Paulino, N.; Goes, J.. "Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 301-304. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866596190&partnerID=MN8TOARS.
    10.1109/ISCAS.2012.6271952
  42. Santin, E.; Oliveira, L.B.; Goes, J.. "Fast and accurate estimation of gain and sample-time mismatches in time-interleaved ADCs using on-chip oscillators". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 3154-3157. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866617792&partnerID=MN8TOARS.
    10.1109/ISCAS.2012.6271991
  43. Santin, E.; Figueiredo, M.; Goes, J.; Oliveira, L.B.. "CMOS fully differential feedforward-regulated folded cascode amplifier". IFIP Advances in Information and Communication Technology 349 AICT (2011): 565-572. http://www.scopus.com/inward/record.url?eid=2-s2.0-79952228719&partnerID=MN8TOARS.
    10.1007/978-3-642-19170-1_62
  44. Santin, E.; Oliveira, L.B.; Nowacki, B.; Goes, J.. "A fully integrated and reconfigurable architecture for coherent self-testing of high speed analog-to-digital converters". IEEE Transactions on Circuits and Systems I: Regular Papers 58 7 (2011): 1531-1541. http://www.scopus.com/inward/record.url?eid=2-s2.0-79959796238&partnerID=MN8TOARS.
    10.1109/TCSI.2011.2143230
  45. Figueiredo, M.; Santos-Tavares, R.; Santin, E.; Ferreira, J.; Evans, G.; Goes, J.. "A two-stage fully differential inverter-based self-biased CMOS amplifier with high efficiency". IEEE Transactions on Circuits and Systems I: Regular Papers 58 7 (2011): 1591-1603. http://www.scopus.com/inward/record.url?eid=2-s2.0-79959785366&partnerID=MN8TOARS.
    10.1109/TCSI.2011.2150910
  46. Figueiredo, M.; Santin, E.; Goes, J.; Paulino, N.; Barúqui, F.A.P.; Petraglia, A.. "Flipped-around multiply-by-two amplifier with unity feedback factor". Analog Integrated Circuits and Signal Processing 68 1 (2011): 133-138. http://www.scopus.com/inward/record.url?eid=2-s2.0-80052437306&partnerID=MN8TOARS.
    10.1007/s10470-011-9642-5
  47. Nowacki, B.; Paulino, N.; Goes, J.. "A second-order switched-capacitor ds modulator using very incomplete settling". Proceedings - IEEE International Symposium on Circuits and Systems (2011): 1367-1370. http://www.scopus.com/inward/record.url?eid=2-s2.0-79960859610&partnerID=MN8TOARS.
    10.1109/ISCAS.2011.5937826
  48. Silva, A.; Cavalheiro, D.; Abdollahvand, S.; Oliveira, L.B.; Figueiredo, M.; Goes, J.. "A self-biased ring oscillator with quadrature outputs operating at 600 MHz in a 130 nm CMOS technology". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 221-224. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053312818&partnerID=MN8TOARS.
  49. Abdollahvand, S.; Goes, J.; Paulino, N.; Nowacki, B.; Gomes, L.. "A polyphase comb filter using interlaying multiplexers for high-speed single-bit sigma-delta modulators". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 216-220. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053303696&partnerID=MN8TOARS.
  50. Pacheco, J.; Paulino, N.; Figueiredo, M.; Goes, J.. "Design of a 10-bit 40 MS/s pipelined ADC using 1.5-bit with current-mode reference shifting". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 299-302. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053305005&partnerID=MN8TOARS.
  51. Nowacki, B.; Paulino, N.; Goes, J.. "Analysis and the design of a first - Order ¿S modulator using very incomplete settling". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 274-278. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053313045&partnerID=MN8TOARS.
  52. Ortigueira, E.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.. "A simplified design of a MOSFET-only wideband Gilbert cell". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 225-230. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053329069&partnerID=MN8TOARS.
  53. Ortigueira, E.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.. "A simplified design methodology for MOSFET-only wideband mixer". International Journal of Electronics and Telecommunications 57 4 (2011): 503-509. http://www.scopus.com/inward/record.url?eid=2-s2.0-84855505666&partnerID=MN8TOARS.
    10.2478/v10177-011-0071-2
  54. Nowacki, B.; Paulino, N.; Goes, J.. "A 1.2 V 300 µW second-order switched-capacitor ¿S modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS". European Solid-State Circuits Conference (2011): 271-274. http://www.scopus.com/inward/record.url?eid=2-s2.0-82955201561&partnerID=MN8TOARS.
    10.1109/ESSCIRC.2011.6044959
  55. Oliveira, J.; Goes, J.; Figueiredo, M.; Santin, E.; Fernandes, J.; Ferreira, J.. "An 8-bit 120-MS/s interleaved CMOS pipeline ADC based on MOS parametric amplification". IEEE Transactions on Circuits and Systems II: Express Briefs 57 2 (2010): 105-109. http://www.scopus.com/inward/record.url?eid=2-s2.0-77649339742&partnerID=MN8TOARS.
    10.1109/TCSII.2009.2038632
  56. Custódio, J.R.; Figueiredo, M.; Santin, E.; Goes, J.. "A CMOS inverter-based self-biased fully differential amplifier". IFIP Advances in Information and Communication Technology 314 (2010): 541-548. http://www.scopus.com/inward/record.url?eid=2-s2.0-77649254549&partnerID=MN8TOARS.
    10.1007/978-3-642-11628-5_60
  57. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". Analog Integrated Circuits and Signal Processing 64 1 (2010): 13-22. http://www.scopus.com/inward/record.url?eid=2-s2.0-77953620055&partnerID=MN8TOARS.
    10.1007/s10470-009-9357-z
  58. Santin, E.; Oliveira, L.B.; Nowacki, B.; Goes, J.. "Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 1927-1930. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955996758&partnerID=MN8TOARS.
    10.1109/ISCAS.2010.5538009
  59. Figueiredo, M.; Santin, E.; Goes, J.; Santos-Tavares, R.; Evans, G.. "Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 2828-2831. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955995395&partnerID=MN8TOARS.
    10.1109/ISCAS.2010.5536985
  60. Custódio, J.R.; Oliveira, J.; Oliveira, L.B.; Goes, J.; Bruun, E.. "MOSFET-only mixer/IIR filter with gain using parametric amplification". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 1209-1212. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955997184&partnerID=MN8TOARS.
    10.1109/ISCAS.2010.5537293
  61. Bastos, I.; Oliveira, L.B.; Goes, J.; Silva, M.. "MOSFET-only wideband LNA with noise cancelling and gain optimization". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 306-311. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957253783&partnerID=MN8TOARS.
  62. Lopes, B.; Paulino, N.; Goes, J.; Steiger-Garção, A.. "Digitally programmable delay-locked-loop with variable charge pump current". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 259-264. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957281950&partnerID=MN8TOARS.
  63. Santin, E.; Figueiredo, M.; Tavares, R.; Goes, J.; Oliveira, L.B.. "Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices". 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings (2010): 25-28. http://www.scopus.com/inward/record.url?eid=2-s2.0-79953093908&partnerID=MN8TOARS.
    10.1109/ICECS.2010.5724445
  64. Goes, J.; Paulino, N.; Figueiredo, M.; Santin, E.; Rodrigues, M.; Faria, P.; Vaz, B.; Monteiro, R.. "Purely-digital versus mixed-signal self-calibration techniques in high-resolution pipeline ADCs". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751529222&partnerID=MN8TOARS.
    10.1109/NORCHIP.2010.5669424
  65. Custódio, J.R.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.; Bruun, E.; Andreani, P.. "A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751553142&partnerID=MN8TOARS.
    10.1109/NORCHIP.2010.5669429
  66. Figueiredo, M.; Michalak, T.; Goes, J.; Gomes, L.; Sniatala, P.. "Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits". 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009 (2009): 763-766. http://www.scopus.com/inward/record.url?eid=2-s2.0-77951432156&partnerID=MN8TOARS.
    10.1109/ICECS.2009.5410771
  67. Gama, R.; Galhardo, A.; Goes, J.; Paulino, N.; Neves, R.; Horta, N.. "Design of a low-power, open loop, multiply-by-two amplifier with gain-accuracy improved by local-feedback". Proceedings of the 16th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2009 (2009): 248-251. http://www.scopus.com/inward/record.url?eid=2-s2.0-72149110321&partnerID=MN8TOARS.
  68. Esperança, B.; Goes, J.; Tavares, R.; Galhardo, A.; Paulino, N.; Medeiros Silva, M.. "Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 220-223. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749094634&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541394
  69. Galhardo, A.; Goes, J.; Paulino, N.. "Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2258-2261. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086355&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541903
  70. Figueiredo, M.; Paulino, N.; Evans, G.; Goes, J.. "New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 232-235. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086144&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541397
  71. Santos-Tavares, R.; Paulino, N.; Higino, J.; Goes, J.; Oliveira, J.P.. "Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 724-727. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749112891&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4541520
  72. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "A multiplying-by-two CMOS amplfifier for high-speed ADCS based on parametric amplification". Proceedings of The 15th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2008 (2008): 177-180. http://www.scopus.com/inward/record.url?eid=2-s2.0-56349171251&partnerID=MN8TOARS.
  73. Custódio, J.R.; Paulino, N.; Goes, J.; Bruun, E.. "Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 1107-1110. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849140303&partnerID=MN8TOARS.
    10.1109/ICECS.2008.4675051
  74. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 251-254. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849087451&partnerID=MN8TOARS.
    10.1109/ICECS.2008.4674838
  75. Paulino, N.; Goes, J.; Steiger-Garção, A.. "A CMOS variable width short-pulse generator circuit for UWB radar applications". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2713-2716. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749118458&partnerID=MN8TOARS.
    10.1109/ISCAS.2008.4542017
  76. Goes, J.; Pereira, J.C.; Paulino, N.; Silva, M.M.. "Switched-capacitor multiply-by-two amplifier insensitive to component mismatches". IEEE Transactions on Circuits and Systems II: Express Briefs 54 1 (2007): 29-33. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847671350&partnerID=MN8TOARS.
    10.1109/TCSII.2006.884123
  77. Oliveira, J.P.; Goes, J.; Esperança, B.; Paulino, N.; Fernandes, J.. "Low-power CMOS comparator with embedded amplification for ultra-high-speed ADCs". Proceedings - IEEE International Symposium on Circuits and Systems (2007): 3602-3605. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548858984&partnerID=MN8TOARS.
  78. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2007): 218-221. http://www.scopus.com/inward/record.url?eid=2-s2.0-50649095466&partnerID=MN8TOARS.
    10.1109/ICECS.2007.4510969
  79. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.. "Improved low-power low-voltage CMOS comparator for 4-bit flash ADCS for UWB applications". Proceedings of the 14th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2007 (2007): 293-296. http://www.scopus.com/inward/record.url?eid=2-s2.0-47749152264&partnerID=MN8TOARS.
    10.1109/MIXDES.2007.4286170
  80. Goes, J.; Vaz, B.; Monteiro, R.; Paulino, N.. "A 0.9V ¿S modulator with 80dB SNDR and 83dB DR using a single-phase technique". Digest of Technical Papers - IEEE International Solid-State Circuits Conference (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33847745487&partnerID=MN8TOARS.
  81. Galhardo, A.; Goes, J.; Paulino, N.. "Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability". Proceedings - IEEE International Symposium on Circuits and Systems (2006): 2001-2004. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847618539&partnerID=MN8TOARS.
  82. Santos-Tavares, R.; Paulino, N.; Goes, J.; Oliveira, J.P.. "Optimum sizing and compensation of two-stage CMOS amplifiers based on a time-domain approach". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2006): 533-536. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349126139&partnerID=MN8TOARS.
    10.1109/ICECS.2006.379843
  83. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using a 1.5 v CMOS Gaussian noise generator". 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (2006): 669-672. http://www.scopus.com/inward/record.url?eid=2-s2.0-43549094267&partnerID=MN8TOARS.
    10.1109/EDSSC.2005.1635363
  84. Vaz, B.; Goes, J.; Piloto, R.; Neto, J.; Monteiro, R.; Paulino, N.. "A Low-Voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 4074-4077. http://www.scopus.com/inward/record.url?eid=2-s2.0-33845733892&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1465526
  85. Goes, J.; Vaz, B.; Paulino, N.; Pinto, H.; Monteiro, R.; Garção, A.S.. "Switched-capacitor circuits using a single-phase scheme". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 3123-3126. http://www.scopus.com/inward/record.url?eid=2-s2.0-39749155470&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1465289
  86. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 796-799. http://www.scopus.com/inward/record.url?eid=2-s2.0-39749149536&partnerID=MN8TOARS.
    10.1109/ISCAS.2005.1464708
  87. Goes, J.; Paulino, N.; Pinto, H.; Monteiro, R.; Vaz, B.; Garção, A.S.. "Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme". IEEE Transactions on Circuits and Systems I: Regular Papers 52 12 (2005): 2595-2604. http://www.scopus.com/inward/record.url?eid=2-s2.0-29344466938&partnerID=MN8TOARS.
    10.1109/TCSI.2005.857552
  88. Vaz, B.; Goes, J.; Paulino, N.. "A 1.5-V 10-b 50 MS/s time-interleaved switched-opamp pipeline CMOS ADC with high energy efficiency". IEEE Symposium on VLSI Circuits, Digest of Technical Papers CIRCUITS S (2004): 432-435. http://www.scopus.com/inward/record.url?eid=2-s2.0-4544256283&partnerID=MN8TOARS.
  89. Goes, J.; Pinto, H.; Monteiro, R.; Paulino, N.; Vaz, B.; AS-Garção. "Low power low-voltage CMOS A/D switched-opamp ~A modulator for bio-potential signals using a single-phase scheme". 2004 IEEE International Workshop on Biomedical Circuits and Systems (2004): http://www.scopus.com/inward/record.url?eid=2-s2.0-28244496132&partnerID=MN8TOARS.
  90. Unterweissacher, M.; Goes, J.; Paulino, N.; Evans, G.; Ortigueira, M.D.. "Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038489138&partnerID=MN8TOARS.
  91. Tavares, R.; Vaz, B.; Goes, J.; Paulina, N.; Steiger-Garção, A.. "Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038496823&partnerID=MN8TOARS.
  92. Paulina, N.; Serrazina, M.; Goes, J.; Steiger-Garção, A.. "Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158224&partnerID=MN8TOARS.
  93. Evans, G.; Goes, J.; Steiger-Garção, A.; Ortigueira, M.D.; Paulino, N.; Sousa Lopes, J.. "Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158222&partnerID=MN8TOARS.
  94. Vaz, B.; Paulino, N.; Goes, J.; Costa, R.; Tavares, R.; Steiger-Garção, A.. "Design of low-voltage CMOS pipelined ADC's using 1 pico-Joule of energy per conversion". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292221&partnerID=MN8TOARS.
  95. Paulino, N.; Rebelo, H.; Pires, F.; Ventim Neves, I.; Goes, J.; Steiger-Garção, A.. "Design of a spiral-mode microstrip antenna and matching circuitry for ultra-wide-band receivers". Proceedings - IEEE International Symposium on Circuits and Systems 3 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292921&partnerID=MN8TOARS.
  96. Amaral, P.; Goes, J.; Paulino, N.; Steiger-Garção, A.. "An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036297264&partnerID=MN8TOARS.
  97. Goes, J.; Paulino, N.; Ortigueira, M.D.. "Digital-domain self-calibration technique for video-rate pipeline A/D converters using Gaussian white noise". Electronics Letters 38 19 (2002): 1100-1101. http://www.scopus.com/inward/record.url?eid=2-s2.0-0037068726&partnerID=MN8TOARS.
    10.1049/el:20020731
  98. Paulino, N.; Goes, J.; Steiger-Garção, A.. "Design methodology for optimization of analog building blocks using genetic algorithms". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2001): 435-438. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035019603&partnerID=MN8TOARS.
  99. Vaz, B.; Costa, R.; Paulino, N.; Goes, J.; Tavares, R.; Steiger-Garção, A.. "A general-purpose kernel based on genetic algorithms for optimization of complex analog circuits". Midwest Symposium on Circuits and Systems 1 (2001): 83-86. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035574034&partnerID=MN8TOARS.
  100. Horta, N.; Fino, M.; Goes, J.. "Symbolic techniques applied to switched-current ADCs synthesis". Proceedings - IEEE International Symposium on Circuits and Systems 3 (2000): http://www.scopus.com/inward/record.url?eid=2-s2.0-0033698138&partnerID=MN8TOARS.
  101. Goes, J.; Vital, J.C.; Franca, J.E.. "Systematic design for optimization of high-speed self-calibrated pipelined A/D converters". IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45 12 (1998): 1513-1526. http://www.scopus.com/inward/record.url?eid=2-s2.0-0032259908&partnerID=MN8TOARS.
    10.1109/82.746663
  102. Goes, J.; Vital, J.C.; Franca, J.E.. "CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters". Proceedings of the Custom Integrated Circuits Conference (1996): 105-108. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029701107&partnerID=MN8TOARS.
  103. Goes, Joao; Vital, Joao C.; Franca, Jose E.. "Optimum resolution-per-stage in high-speed pipelined A/D converters using self-calibration". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1995): 525-528. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029191729&partnerID=MN8TOARS.
  104. Goes, J.; Vital, J.C.; Franca, J.E.. "Analogue self-calibration technique for high-resolution video-rate pipelined A/D converters". Midwest Symposium on Circuits and Systems 2 (1995): 740-743. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029457797&partnerID=MN8TOARS.
  105. Vital, J.C.; Horta, N.C.; Silva, N.S.; Franca, N.E.; Goes, J.; Lanca, M.A.; Franca, J.E.. "Automatic synthesis of modular data conversion architectures and functional building blocks". IEE Conference Publication 393 (1994): 102-109. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028018726&partnerID=MN8TOARS.
  106. Goes, J.; Franca, J.; Paulino, N.; Grilo, J.; Temes, G.. "High-linearity calibration of low-resolution digital-to-analog converters". Proceedings - IEEE International Symposium on Circuits and Systems 5 (1994): 345-348. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028572582&partnerID=MN8TOARS.
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2018/01/01 - 2022/03/01 An Energy-Efficient Hybrid DAC based SAR ADC using Deep-submicron CMOS and Large-Area Oxide TFT Technologies
Co-supervisor of Bhawna Tiwari
 Electronics (PhD)
Indraprastha Institute of Information Technology Delhi, India
2016/03/01 - 2021/01/24 TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors
Co-supervisor
 Electronics (PhD)
Universidade Nova de Lisboa, Portugal
2014/01/01 - 2021/01/19 Design of High-performance Low-noise and Low-power Digital CMOS Circuitry for Mixed-Signal Systems Integrating Asynchronous Architectures and Employing Self-Biased Logic
Supervisor
 Doctoral Program in Electrical and Computer Engineering (PhD)
Universidade Nova de Lisboa, Portugal
2015/01/01 - 2019/12/19 Analog-to-Digital Converters with embedded IF mixing using variable reference voltages
Supervisor
 Electronics (PhD)
Universidade Nova de Lisboa, Portugal
2014 - 2018 A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Gain Improvement
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011 - 2017/12/18 Sigma-Delta Modulators with Passive RC Integrators: Theory, Design Methodology for Optimization and Silicon Results
Co-supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2011 - 2016/05/11 Design of sigma-delta modulators for analog-to-digital conversion intensively using passive circuits
Co-supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/17 Design of analog-to-digital converters with embedded mixing for ultra-low-power radio receivers
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/16 A Built-in self-test technique for high speed analog-to-digital converters
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2008 - 2011/12/21 Ultra-Low Power-and-Area CMOS RF and Baseband Circuits for Biomedical
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2005 - 2010/12/22 Conversão Analógo-digital de Elevada Velocidade para Receptores Digitais Ultra-wideband
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2006 - 2010/12/20 Metodologias e Ferramentas para o Desenho de Circuitos Electrónicos Analógicos Assistidos por Computador
Co-supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2003 - 2008/11 Novel Techniques for the Design and Practical Realization of Switched-capacitor Circuits in Deep-submicron Cmos Technologies
Supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2004 - 2008 Reference-Free High-Speed CMOS Pipeline Analog-to-Digital Converters
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2001 - 2006 Geradores de Ruído Branco Gaussiano e Uniforme para a Realização de Teste e Calibração Automática de Adc´s em Circuitos Integrados Cmos
Supervisor
 Física (PhD)
Universidade de Lisboa, Portugal
2001 - 2005 Conversores Analógico/digital de Elevada Velocidade e Tensão de Alimentação Reduzida
Supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Distinctions

Award

2017 Best Teacher Award in Electrical and Computer Engineering 2016/2017
Faculdade de Ciencias e Tecnologia da Universidade NOVA de Lisboa, Portugal
2016 Prémio Inovação INCM 2016, “Papel Secreto – uma abordagem inovadora e de baixo custo”
Imprensa Nacional Casa da Moeda (INCM), Portugal
2012 2012 IEEE CASS Outstanding Young Author Award
IEEE Circuits and Systems Society, United States