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Nuno Paulino. Concluiu o(a) Título de Agregado em Universidade Nova de Lisboa em 2019/05/17 pelo(a) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Doutoramento em Engenharia Electrotécnica em 2008 pelo(a) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Mestrado em Engenharia Electrotécnica e de Computadores em 1996/03/25 pelo(a) Universidade de Lisboa Instituto Superior Técnico e Licenciatura em Engenharia Electrotécnica e de Computadores em 1992/12/03 pelo(a) Universidade de Lisboa Instituto Superior Técnico. É Professor Associado no(a) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia. Publicou 48 artigos em revistas especializadas. Possui 10 livro(s). Orientou 5 tese(s) de doutoramento. Atua na(s) área(s) de Ciências da Engenharia e Tecnologias com ênfase em Engenharia Eletrotécnica, Eletrónica e Informática com ênfase em Engenharia Eletrotécnica e Eletrónica. No seu currículo Ciência Vitae os termos mais frequentes na contextualização da produção científica, tecnológica e artístico-cultural são: ADC; DAC; Sigma delta modulators; Filters:; Signal Processing; Circuit Optimization; .
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Identification

Personal identification

Full name
Nuno Paulino

Citation names

  • Paulino, Nuno

Author identifiers

Ciência ID
C618-FA62-5517
ORCID iD
0000-0001-8053-902X

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Electrical and Electronic Engineering
Education
Degree Classification
2019/05/17
Concluded
 Universidade Nova de Lisboa (Título de Agregado)
Major in Electrónica
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
 Aprovado por unanimidade
2008
Concluded
 Engenharia Electrotécnica (Doutoramento)
Major in Especialidade: Electrónica
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
"Implementação em Tecnologia Cmos de um Sensor de Radar de Baixo Custo e Pequeno Alcance" (THESIS/DISSERTATION)
1996/03/25
Concluded
 Engenharia Electrotécnica e de Computadores (Mestrado)
Major in Electrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
 Aprovado
1992/12/03
Concluded
 Engenharia Electrotécnica e de Computadores (Licenciatura)
Major in Sistemas e Computadores
Universidade de Lisboa Instituto Superior Técnico, Portugal
 15
Affiliation

Teaching in Higher Education

Category
Host institution 		Employer
2021/03/01 - Current Associate Professor (University Teacher) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2008/01/03 - 2020/05/01 Assistant Professor (University Teacher) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Outputs

Publications

Book
  1. Madeira, R.; Paulino, N.. Design methodology for an all CMOS bandgap voltage reference circuit. 2017.
    10.1007/978-3-319-56077-9_43
  2. Carvalho, C.; Paulino, N.. Cmos indoor light energy harvesting system for wireless sensing applications: An overview. 2016.
    10.1007/978-3-319-31165-4_19
  3. Ferreira Carvalho, C.M.; Paulino, N.F.S.V.. CMOS indoor light energy harvesting system for wireless sensing applications. 2015.
    10.1007/978-3-319-21617-1
  4. Serra, H.; Madeira, R.; Paulino, N.. Analysis of a multi-ratio switched capacitor DC-DC converter for a supercapacitor power supply. 2015.
    10.1007/978-3-319-16766-4_51
  5. Serra, H.; Santos-Tavares, R.; Paulino, N.. A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications. 2014.
    10.1007/978-3-642-54734-8_59
  6. Leitão, P.V.; De Melo, J.L.; Paulino, N.. Design of a fully differential power output stage for a class D audio amplifier using a single-ended power supply. 2013.
  7. Carvalho, C.; Paulino, N.. A voltage limiter circuit for indoor light energy harvesting applications. 2013.
  8. Serra, H.; Paulino, N.; Goes, J.. A switched-capacitor band-pass biquad filter using a simple quasi-unity gain amplifier. 2013.
  9. Pereira, N.; De Melo, J.L.; Paulino, N.. Design of a 3rd order 1.5-bit continuous-time fully differential sigma-delta (¿¿) modulator optimized for a class D audio amplifier using differential pairs. 2013.
  10. Carvalho, C.; Lavareda, G.; Paulino, N.. A DC-DC step-up µ-power converter for energy harvesting applications, using maximum power point tracking, based on fractional open circuit voltage. 2011.
    10.1007/978-3-642-19170-1_56
Conference paper
  1. Serra, H.; Oliveira, J.P.; Paulino, N.. "A 50 Hz SC notch filter for IoT applications". 2017.
    10.1109/ISCAS.2017.8050904
  2. Fouto, D.; Paulino, N.. "A 3rd order MASH switched-capacitor S¿M using ultra incomplete settling employing an area reduction technique". 2017.
    10.1109/ISCAS.2017.8050370
  3. Nowacki, B.; Paulino, N.; Goes, J.. "A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ?SM". 2016.
    10.1109/ISSCC.2016.7418013
  4. Sniatala, P.; Handkiewicz, A.; Goes, J.; Paulino, N.; Oliveira, J.P.. "Fully differential sigma-delta modulator structure for current-mode sensors". 2016.
    10.1109/ICSES.2016.7593816
  5. Madeira, R.; Oliveira, J.P.; Paulino, N.. "A multi-cell SC DC-DC converter controller with power aware output ripple reduction". 2016.
    10.1109/PRIME.2016.7519507
  6. Quendera, F.; Paulino, N.. "A Low Voltage Low Power Temperature Sensor Using a 2nd Order Delta-Sigma Modulator". 2016.
    10.1109/DCIS.2015.7388608
  7. Paulino, Nuno. "A low voltage low power temperature sensor using a 2nd order delta-sigma modulator". 2015.
    doi: 10.1109/DCIS.2015.7388608
  8. Paulino, Nuno. "A simple class-D audio power amplifier using a passive CT S¿ modulator for medium quality sound systems". 2015.
    doi: 10.1109/MIXDES.2015.7208582
  9. De Melo, J.L.A.; Leitao, P.V.; Goes, J.; Paulino, N.. "A simple clab-D audio power amplifier using a pabive CT S¿ modulator for medium quality sound systems". 2015.
    10.1109/MIXDES.2015.7208582
  10. Abdollahvand, S.; Paulino, N.; Gomes, L.; Goes, J.. "A current-mode VCO-based amplifier-less 2nd-order ¿S modulator with over 85dB SNDR". 2015.
    10.1109/ISCAS.2015.7169077
  11. De Melo, J.L.A.; Goes, J.; Paulino, N.. "A 0.7 v 256 µw ¿S modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW". 2015.
    10.1109/VLSIC.2015.7231294
  12. Paulino, Nuno. "Improving the efficiency of a 2???1 SC DC-DC converter using the parasitic capacitances,". 2015.
    10.1109/DCIS.2015.7388607
  13. Nowacki, B.; Paulino, N.; Goes, J.. "A low power 4th order MASH switched-capacitor S¿ modulator using ultra incomplete settling". 2014.
    10.1109/ISCAS.2014.6865392
  14. Sniatala, P.; Naumowicz, M.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "A hybrid current-mode passive second-order continuous-time S¿ modulator". 2014.
    10.1109/MIXDES.2014.6872168
  15. De Melo, J.L.A.; Querido, F.; Paulino, N.; Goes, J.. "A 0.4-V 410-nW opamp-less continuous-time S¿ modulator for biomedical applications". 2014.
    10.1109/ISCAS.2014.6865391
  16. Serra, H.; Santos-Tavares, R.; Paulino, N.. "A top-down optimization methodology for SC filter circuit design". 2014.
    10.1109/ISCAS.2014.6865474
  17. Oliveira, L.B.; Paulino, N.; Pereira, N.. "The design of a light barrier system as an undergraduate laboratory project". 2014.
    10.1109/ISCAS.2014.6865662
  18. Serra, H.; Paulino, N.; Goes, J.. "A switched-capacitor biquad using a simple quasi-unity gain amplifier". 2013.
    10.1109/ISCAS.2013.6572223
  19. Paulino, N.; Oliveira, J.P.; Santos-Tavares, R.. "The design of an audio power amplifier as a class project for undergraduate students". 2013.
    10.1109/ISCAS.2013.6572402
  20. De Melo, J.L.A.; Nowacki, B.; Paulino, N.; Goes, J.. "Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions". 2012.
    10.1109/ISCAS.2012.6271952
  21. Abdollahvand, S.; Goes, J.; Oliveira, L.B.; Gomes, L.; Paulino, N.. "Low phase-noise temperature compensated self-biased ring oscillator". 2012.
    10.1109/ISCAS.2012.6271805
  22. Pacheco, J.; Figueiredo, M.; Paulino, N.; Goes, J.. "Current-mode reference shifting solution for MDAC-based analog-to-digital converters". 2012.
    10.1109/ISCAS.2012.6271946
  23. Carvalho, C.; Lavareda, G.; Lameiro, J.; Paulino, N.. "A step-up µ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking". 2011.
    10.1109/ISCAS.2011.5937965
  24. Nowacki, B.; Paulino, N.; Goes, J.. "A 1.2 V 300 µW second-order switched-capacitor ¿S modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS". 2011.
    10.1109/ESSCIRC.2011.6044959
  25. Nowacki, B.; Paulino, N.; Goes, J.. "A second-order switched-capacitor ds modulator using very incomplete settling". 2011.
    10.1109/ISCAS.2011.5937826
  26. Goes, J.; Paulino, N.; Figueiredo, M.; Santin, E.; Rodrigues, M.; Faria, P.; Vaz, B.; Monteiro, R.. "Purely-digital versus mixed-signal self-calibration techniques in high-resolution pipeline ADCs". 2010.
    10.1109/NORCHIP.2010.5669424
  27. Paulino, N.; Goes, J.; Steiger-Garção, A.. "A CMOS variable width short-pulse generator circuit for UWB radar applications". 2008.
    10.1109/ISCAS.2008.4542017
  28. Figueiredo, M.; Paulino, N.; Evans, G.; Goes, J.. "New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise". 2008.
    10.1109/ISCAS.2008.4541397
  29. Santos-Tavares, R.; Paulino, N.; Higino, J.; Goes, J.; Oliveira, J.P.. "Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm". 2008.
    10.1109/ISCAS.2008.4541520
  30. Esperança, B.; Goes, J.; Tavares, R.; Galhardo, A.; Paulino, N.; Medeiros Silva, M.. "Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC". 2008.
    10.1109/ISCAS.2008.4541394
  31. Galhardo, A.; Goes, J.; Paulino, N.. "Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback". 2008.
    10.1109/ISCAS.2008.4541903
  32. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification". 2008.
    10.1109/ICECS.2008.4674838
  33. Custódio, J.R.; Paulino, N.; Goes, J.; Bruun, E.. "Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids". 2008.
    10.1109/ICECS.2008.4675051
  34. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.. "Improved low-power low-voltage CMOS comparator for 4-bit flash ADCS for UWB applications". 2007.
    10.1109/MIXDES.2007.4286170
  35. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". 2007.
    10.1109/ICECS.2007.4510969
  36. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using a 1.5 v CMOS Gaussian noise generator". 2006.
    10.1109/EDSSC.2005.1635363
  37. Santos-Tavares, R.; Paulino, N.; Goes, J.; Oliveira, J.P.. "Optimum sizing and compensation of two-stage CMOS amplifiers based on a time-domain approach". 2006.
    10.1109/ICECS.2006.379843
  38. Vaz, B.; Goes, J.; Piloto, R.; Neto, J.; Monteiro, R.; Paulino, N.. "A Low-Voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing". 2005.
    10.1109/ISCAS.2005.1465526
  39. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using gaussian noise". 2005.
    10.1109/ISCAS.2005.1464708
  40. Goes, J.; Vaz, B.; Paulino, N.; Pinto, H.; Monteiro, R.; Garção, A.S.. "Switched-capacitor circuits using a single-phase scheme". 2005.
    10.1109/ISCAS.2005.1465289
Journal article
  1. Serra, Hugo; Santos-Tavares, Rui; Paulino, Nuno. "Transistor-level optimization methodology for the complete design of switched-capacitor filter circuits". International Journal of Circuit Theory and Applications 49 1 (2020): 94-113. http://dx.doi.org/10.1002/cta.2891.
    10.1002/cta.2891
  2. "Analysis of capacitance spread reduction techniques for 50-Hz switched-capacitor notch filters". International Journal of Circuit Theory and Applications 48 11 (2020): 1922-1941. https://doi.org/10.1002/cta.2863.
    Published • https://doi.org/10.1002/cta.2863
  3. Hugo Serra; Ivan Bastos; Joao L. A. de Melo; Joao P. Oliveira; Nuno Paulino; Elyes Nefzaoui; Tarik Bourouina. "A 0.9-V Analog-to-Digital Acquisition Channel for an IoT Water Management Sensor Node". IEEE Transactions on Circuits and Systems II: Express Briefs 66 10 (2019): 1678-1682. https://doi.org/10.1109/TCSII.2019.2933276.
    10.1109/TCSII.2019.2933276
  4. Joao L. A. de Melo; Nuno Pereira; Pedro V. Leitao; Nuno Paulino; Joao Goes. "A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm". IEEE Transactions on Circuits and Systems I: Regular Papers (2019): 1-13. https://doi.org/10.1109/TCSI.2019.2925292.
    10.1109/TCSI.2019.2925292
  5. Joao L. A. de Melo; Nuno Paulino; Joao Goes. "Continuous-Time Delta-Sigma Modulators Based on Passive RC Integrators". IEEE Transactions on Circuits and Systems I: Regular Papers (2018): 1-13. https://doi.org/10.1109/TCSI.2018.2855649.
    10.1109/TCSI.2018.2855649
  6. Hugo Serra; Joao P. Oliveira; Nuno Paulino. "A 0.9-V Programmable Second-Order Bandpass Switched-Capacitor Filter for IoT Applications". IEEE Transactions on Circuits and Systems II: Express Briefs (2018): 1-1. https://doi.org/10.1109/TCSII.2018.2852812.
    10.1109/TCSII.2018.2852812
  7. Ricardo Madeira; Joao P. Oliveira; Nuno Paulino. "A 130 nm CMOS Power Management Unit With a Multi-Ratio Core SC DC–DC Converter for a Supercapacitor Power Supply". IEEE Transactions on Circuits and Systems II: Express Briefs (2018): https://doi.org/10.1109/TCSII.2018.2861082.
    10.1109/TCSII.2018.2861082
  8. Blazej Nowacki; Nuno Paulino; Joao Goes. "A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators". IEEE Transactions on Circuits and Systems I: Regular Papers 64 11 (2017): 2871-2883. https://doi.org/10.1109/TCSI.2017.2704164.
    10.1109/TCSI.2017.2704164
  9. Serra, H.; Santos-Tavares, R.; Paulino, N.. "A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking into Account Non-Ideal Effects of Switches and Amplifiers". IEEE Transactions on Circuits and Systems I: Regular Papers 64 1 (2017): 61-71. http://www.scopus.com/inward/record.url?eid=2-s2.0-85001065588&partnerID=MN8TOARS.
    10.1109/TCSI.2016.2601343
  10. Oliveira, L.B.; Paulino, N.; Oliveira, J.P.; Santos-Tavares, R.; Pereira, N.; Goes, J.. "Undergraduate electronics projects based on the design of an optical wireless audio transmission system". IEEE Transactions on Education 60 2 (2017): 105-111. http://www.scopus.com/inward/record.url?eid=2-s2.0-84981745011&partnerID=MN8TOARS.
    10.1109/TE.2016.2590999
  11. Madeira, R.; Paulino, N.. "Analysis and implementation of a power management unit with a multiratio switched capacitor DC-DC converter for a supercapacitor power supply". International Journal of Circuit Theory and Applications (2016): http://www.scopus.com/inward/record.url?eid=2-s2.0-84961750940&partnerID=MN8TOARS.
    10.1002/cta.2209
  12. Paulino, Nuno. "Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool". (2015):
    10.1515/bpasts-2015-0104,
  13. SniataLa, P.; Naumowicz, M.; Handkiewicz, A.; Szcz¿sny, S.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "Current mode sigma-delta modulator designed with the help of transistor's size optimization tool". Bulletin of the Polish Academy of Sciences: Technical Sciences 63 4 (2015): 919-922. http://www.scopus.com/inward/record.url?eid=2-s2.0-84962129203&partnerID=MN8TOARS.
    10.1515/bpasts-2015-0104
  14. Carvalho, C.; Lavareda, G.; Amaral, A.; De Carvalho, C.N.; Paulino, N.. "A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications". Analog Integrated Circuits and Signal Processing 78 2 (2014): 333-351. http://www.scopus.com/inward/record.url?eid=2-s2.0-84895060613&partnerID=MN8TOARS.
    10.1007/s10470-013-0222-8
  15. Figueiredo, M.; Santin, E.; Goes, J.; Evans, G.; Paulino, N.. "A reference-free 7-bit 500 MS/s pipeline ADC using current-mode reference shifting and quantizers with built-in thresholds". Analog Integrated Circuits and Signal Processing 75 1 (2013): 53-65. http://www.scopus.com/inward/record.url?eid=2-s2.0-84874941237&partnerID=MN8TOARS.
    10.1007/s10470-013-0030-1
  16. Carvalho, C.; Paulino, N.. "Start-up circuit for low-power indoor light energy harvesting applications". Electronics Letters 49 10 (2013): 636-638. http://www.scopus.com/inward/record.url?eid=2-s2.0-84880233196&partnerID=MN8TOARS.
    10.1049/el.2012.3418
  17. Custódio, J.R.; Goes, J.; Paulino, N.; Oliveira, J.P.; Bruun, E.. "A 1.2-V 165-µ W 0.29-mm2 multibit sigma-delta ADC for hearing aids using nonlinear DACs and with over 91 dB dynamic-range". IEEE Transactions on Biomedical Circuits and Systems 7 3 (2013): 376-385. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878319543&partnerID=MN8TOARS.
    10.1109/TBCAS.2012.2203819
  18. Carvalho, C.; Oliveira, J.P.; Paulino, N.. "Survey and analysis of the design issues of a low cost micro power DC-DC step up converter for indoor light energy harvesting applications". Proceedings of the 19th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2012 (2012): 455-460. http://www.scopus.com/inward/record.url?eid=2-s2.0-84864199919&partnerID=MN8TOARS.
  19. Pacheco, J.; Paulino, N.; Figueiredo, M.; Goes, J.. "Design of a 10-bit 40 MS/s pipelined ADC using 1.5-bit with current-mode reference shifting". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 299-302. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053305005&partnerID=MN8TOARS.
  20. Nowacki, B.; Paulino, N.; Goes, J.. "Analysis and the design of a first - Order ¿S modulator using very incomplete settling". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 274-278. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053313045&partnerID=MN8TOARS.
  21. Abdollahvand, S.; Goes, J.; Paulino, N.; Nowacki, B.; Gomes, L.. "A polyphase comb filter using interlaying multiplexers for high-speed single-bit sigma-delta modulators". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 216-220. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053303696&partnerID=MN8TOARS.
  22. Figueiredo, M.; Santin, E.; Goes, J.; Paulino, N.; Barúqui, F.A.P.; Petraglia, A.. "Flipped-around multiply-by-two amplifier with unity feedback factor". Analog Integrated Circuits and Signal Processing 68 1 (2011): 133-138. http://www.scopus.com/inward/record.url?eid=2-s2.0-80052437306&partnerID=MN8TOARS.
    10.1007/s10470-011-9642-5
  23. Lopes, B.; Paulino, N.; Goes, J.; Steiger-Garção, A.. "Digitally programmable delay-locked-loop with variable charge pump current". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 259-264. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957281950&partnerID=MN8TOARS.
  24. Carvalho, C.; Paulino, N.. "A MOSFET only, step-up DC-DC micro power converter, for solar energy harvesting applications". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 499-504. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957288205&partnerID=MN8TOARS.
  25. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". Analog Integrated Circuits and Signal Processing 64 1 (2010): 13-22. http://www.scopus.com/inward/record.url?eid=2-s2.0-77953620055&partnerID=MN8TOARS.
    10.1007/s10470-009-9357-z
  26. De Melo, J.; Paulino, N.. "A 3rd order 1.5-bit continuous-time (CT) sigma-delta (S¿) modulator optimized for class D audio power amplifier". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 531-535. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957260995&partnerID=MN8TOARS.
  27. Gama, R.; Galhardo, A.; Goes, J.; Paulino, N.; Neves, R.; Horta, N.. "Design of a low-power, open loop, multiply-by-two amplifier with gain-accuracy improved by local-feedback". Proceedings of the 16th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2009 (2009): 248-251. http://www.scopus.com/inward/record.url?eid=2-s2.0-72149110321&partnerID=MN8TOARS.
  28. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "A multiplying-by-two CMOS amplfifier for high-speed ADCS based on parametric amplification". Proceedings of The 15th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2008 (2008): 177-180. http://www.scopus.com/inward/record.url?eid=2-s2.0-56349171251&partnerID=MN8TOARS.
  29. Goes, J.; Pereira, J.C.; Paulino, N.; Silva, M.M.. "Switched-capacitor multiply-by-two amplifier insensitive to component mismatches". IEEE Transactions on Circuits and Systems II: Express Briefs 54 1 (2007): 29-33. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847671350&partnerID=MN8TOARS.
    10.1109/TCSII.2006.884123
  30. Oliveira, J.P.; Goes, J.; Esperança, B.; Paulino, N.; Fernandes, J.. "Low-power CMOS comparator with embedded amplification for ultra-high-speed ADCs". Proceedings - IEEE International Symposium on Circuits and Systems (2007): 3602-3605. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548858984&partnerID=MN8TOARS.
  31. Galhardo, A.; Goes, J.; Paulino, N.. "Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability". Proceedings - IEEE International Symposium on Circuits and Systems (2006): 2001-2004. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847618539&partnerID=MN8TOARS.
  32. Goes, J.; Vaz, B.; Monteiro, R.; Paulino, N.. "A 0.9V ¿S modulator with 80dB SNDR and 83dB DR using a single-phase technique". Digest of Technical Papers - IEEE International Solid-State Circuits Conference (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33847745487&partnerID=MN8TOARS.
  33. Goes, J.; Paulino, N.; Pinto, H.; Monteiro, R.; Vaz, B.; Garção, A.S.. "Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme". IEEE Transactions on Circuits and Systems I: Regular Papers 52 12 (2005): 2595-2604. http://www.scopus.com/inward/record.url?eid=2-s2.0-29344466938&partnerID=MN8TOARS.
    10.1109/TCSI.2005.857552
  34. Goes, J.; Pinto, H.; Monteiro, R.; Paulino, N.; Vaz, B.; AS-Garção. "Low power low-voltage CMOS A/D switched-opamp ~A modulator for bio-potential signals using a single-phase scheme". 2004 IEEE International Workshop on Biomedical Circuits and Systems (2004): http://www.scopus.com/inward/record.url?eid=2-s2.0-28244496132&partnerID=MN8TOARS.
  35. Vaz, B.; Goes, J.; Paulino, N.. "A 1.5-V 10-b 50 MS/s time-interleaved switched-opamp pipeline CMOS ADC with high energy efficiency". IEEE Symposium on VLSI Circuits, Digest of Technical Papers CIRCUITS S (2004): 432-435. http://www.scopus.com/inward/record.url?eid=2-s2.0-4544256283&partnerID=MN8TOARS.
  36. Evans, G.; Goes, J.; Steiger-Garção, A.; Ortigueira, M.D.; Paulino, N.; Sousa Lopes, J.. "Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158222&partnerID=MN8TOARS.
  37. Unterweissacher, M.; Goes, J.; Paulino, N.; Evans, G.; Ortigueira, M.D.. "Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038489138&partnerID=MN8TOARS.
  38. Vaz, B.; Paulino, N.; Goes, J.; Costa, R.; Tavares, R.; Steiger-Garção, A.. "Design of low-voltage CMOS pipelined ADC's using 1 pico-Joule of energy per conversion". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292221&partnerID=MN8TOARS.
  39. Goes, J.; Paulino, N.; Ortigueira, M.D.. "Digital-domain self-calibration technique for video-rate pipeline A/D converters using Gaussian white noise". Electronics Letters 38 19 (2002): 1100-1101. http://www.scopus.com/inward/record.url?eid=2-s2.0-0037068726&partnerID=MN8TOARS.
    10.1049/el:20020731
  40. Paulino, N.; Rebelo, H.; Pires, F.; Ventim Neves, I.; Goes, J.; Steiger-Garção, A.. "Design of a spiral-mode microstrip antenna and matching circuitry for ultra-wide-band receivers". Proceedings - IEEE International Symposium on Circuits and Systems 3 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292921&partnerID=MN8TOARS.
  41. Amaral, P.; Goes, J.; Paulino, N.; Steiger-Garção, A.. "An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036297264&partnerID=MN8TOARS.
  42. Vaz, B.; Costa, R.; Paulino, N.; Goes, J.; Tavares, R.; Steiger-Garção, A.. "A general-purpose kernel based on genetic algorithms for optimization of complex analog circuits". Midwest Symposium on Circuits and Systems 1 (2001): 83-86. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035574034&partnerID=MN8TOARS.
  43. Paulino, N.; Goes, J.; Steiger-Garção, A.. "Design methodology for optimization of analog building blocks using genetic algorithms". Proceedings - IEEE International Symposium on Circuits and Systems 5 (2001): 435-438. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035019603&partnerID=MN8TOARS.
  44. Yin, Guang-Ming; Ahmed, Kashif; Shamlou, Danny; Grilo, Jorge; Law, Sam; Wong, Ceasar; Paulino, Nuno. "2.7 V CMOS IF transceiver for PHS application". International Conference on Solid-State and Integrated Circuit Technology Proceedings (1998): 356-359. http://www.scopus.com/inward/record.url?eid=2-s2.0-0032226892&partnerID=MN8TOARS.
  45. Paulino, N.; Franca, J.E.. "CMOS digitally programmable current multiplier". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1996): 254-257. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029696987&partnerID=MN8TOARS.
  46. Paulino, N.; Martins, F.P.. "Programmable CMOS Switched-Capacitor Biquad Using Quasi-Passive Algorithmic DAC's". IEEE Journal of Solid-State Circuits 30 6 (1995): 715-719. http://www.scopus.com/inward/record.url?eid=2-s2.0-0012681130&partnerID=MN8TOARS.
    10.1109/4.387079
  47. Goes, J.; Franca, J.; Paulino, N.; Grilo, J.; Temes, G.. "High-linearity calibration of low-resolution digital-to-analog converters". Proceedings - IEEE International Symposium on Circuits and Systems 5 (1994): 345-348. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028572582&partnerID=MN8TOARS.
  48. Marins, F.P.; Paulino, N.F.; France, J.E.. "Charge programming techniques for SC biquads". Proceedings - IEEE International Symposium on Circuits and Systems 2 (1993): 1160-1162. http://www.scopus.com/inward/record.url?eid=2-s2.0-0027168181&partnerID=MN8TOARS.
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2016/09/01 - 2021/12/02 Design of a Fully Integrated Power Management Unit with Multi-ratio and Multi-cell Switched - Capacitor DC-DC Converter
Supervisor of Ricardo Falé de Carvalho Madeira
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2013/09/01 - 2017/12/18 Analysis and Design Methodologies for Switched-Capacitor Filter Circuits in Advanced CMOS Technologies
Supervisor of Hugo Alexandre de Andrade Serra
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2012/09/01 - 2017/12/17 Sigma-Delta Modulators with Passive RC Integrators: Theory, Design Methodology for Optimization and Silicon Results
Supervisor of João Luís Alvernaz de Melo
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2012/09/01 - 2016/05/11 Design of sigma-delta modulators for analog-to-digital conversion intensively using passive circuits
Supervisor of Blazej Czeslaw Nowacki
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2010/09/01 - 2014/07/15 CMOS indoor light energy harvesting system for wireless sensing applications
Supervisor of Carlos Manuel Ferreira Carvalho
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal