Pedro Miguel Florindo Miguens Matutino (851D-A88F-2F71)

Curriculum Vitae

Pedro Miguel Florindo Miguens Matutino

Pedro Miguel Florindo Miguens Matutino. É Professor Adjunto no(a) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa e Investigador visitante no(a) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa.

Identification

Personal identification

Full name: Pedro Miguel Florindo Miguens Matutino

Citation names

Miguens Matutino, Pedro

Author identifiers

Ciência ID: 851D-A88F-2F71
ORCID iD: 0000-0001-6518-1306

Email addresses

pmiguens@deetc.isel.pt (Professional)
pmiguens@cc.isel.ipl.pt (Professional)
pedro.miguens@isel.pt (Professional)

Websites

http://web.tecnico.ulisboa.pt/pedro.miguens.matutino (Scholar)

Knowledge fields

Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Computer Hardware and Architecture

Languages

Language	Speaking	Reading	Writing	Listening	Peer-review
Portuguese	Advanced (C1)	Advanced (C1)	Intermediate (B1)	Advanced (C1)
English	Intermediate (B1)	Intermediate (B1)	Intermediate (B1)	Intermediate (B1)

Education

	Degree	Classification
2015 Concluded	Engenharia Electrotécnica e Computadores (Doutoramento) Universidade de Lisboa Instituto Superior Técnico, Portugal "Residue Number Systems: Efficient Architectures and Circuits " (THESIS/DISSERTATION)	Muito bom
2002 Concluded	Mestrado em Engenharia Electrotécnica e de Computadores, no Ramo de Computadores (Mestrado) Universidade de Lisboa Instituto Superior Técnico, Portugal "Concepção e Desenvolvimento de uma Rede Domótica" (THESIS/DISSERTATION)	5 valores
1999 Concluded	Licenciatura em Engenharia Electrotécnica e de Computadores no Ramo de Sistemas Electrónicos e Computadores (Licenciatura) Universidade de Lisboa Instituto Superior Técnico, Portugal "Sensor Inteligente de Veículos" (THESIS/DISSERTATION)	13 valores

Affiliation

Science

2008/09/01 - Current

Visiting Researcher (Research)

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Teaching in Higher Education

2015/07/26 - Current	Adjunct Teacher (Polytechnic Teacher) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2002/10/17 - 2015/07/24	Assistant (Polytechnic Teacher) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Projects

Contract

	Designation	Funders
2000 - Current	Project of Instituto Superior Técnico for Biblioteca Nacional, in 2000, N682 SIS – Supervision integrated system N682 SIS Technical development Instituto de Engenharia de Sistemas e Computadores, Portugal

Outputs

Publications

Conference paper	Fabio Dias; Pedro Miguens Matutino; Manuel Barata. "Virtual laboratory for educational environments". 2014. 10.1109/rev.2014.6784252 Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa. "ROM-less RNS-to-binary converter moduli {2²ⁿ − 1, 2²ⁿ + 1, 2ⁿ − 3, 2ⁿ + 3}". 2014. 10.1109/isicir.2014.7029521 Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa. "A compact and scalable RNS architecture". 2013. 10.1109/asap.2013.6567565 Matutino, Pedro Miguens; Chaves, Ricardo; Sousa, Leonel. "A Compact and Scalable RNS Architecture". 2013.
Journal article	Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa. "Arithmetic-Based Binary-to-RNS Converter Modulo ${\{2^{n}{\pm}k\}}$ for $jn$ -bit Dynamic Range". IEEE Trans. VLSI Syst. 23 3 (2015): 603-607. http://dx.doi.org/10.1109/tvlsi.2014.2314174. 10.1109/tvlsi.2014.2314174 Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa. "An Efficient Scalable RNS Architecture for Large Dynamic Ranges". J Sign Process Syst 77 1-2 (2014): 191-205. http://dx.doi.org/10.1007/s11265-014-0875-2. 10.1007/s11265-014-0875-2
Thesis / Dissertation	Antão, José Eduardo Cardoso. "Eficiência energética e controlo de iluminação em edifícios". Master, 2015. http://hdl.handle.net/10400.21/5936.

Other

Other output

Matutino, Pedro Miguens; Araújo, Juvenal; Sousa, Leonel; Chaves, Ricardo. 2017. Pipelined FPGA coprocessor for elliptic curve cryptography based on residue number system. In this paper a novel pipelined FPGA coprocessor for ECC is proposed, exploiting the parallelism capabilities of RNS to the computation of large operand algorithms. This intrinsic characteristic of representing large integer numbers as a set of smaller and independent values allows for the parallelization of the computationally heavy large operand multiplications, required in asymmetrical cryptogr. http://hdl.handle.net/10400.21/8488.
Matutino, Pedro Miguens; Chaves, Ricardo; Sousa, Leonel. 2015. Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range. In this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo {2(n) +/- k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing {2(n) +/- k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic r. http://hdl.handle.net/10400.21/5740.
MATUTINO, Pedro Miguens; CHAVES, Ricardo; SOUSA, Leonel - Arithmetic-based binary-to-RNS converter modulo {2(n)+/- k} for jn-Bit dynamic range. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. ISSN. 1063-8210. Vol. 23, N.º 3 (2015), pp. 6
Matutino, Pedro Miguens; Chaves, Ricardo; Sousa, Leonel. 2014. ROM-less RNS-to-binary converter moduli {22N - 1, 22N + 1, 2N - 3, 2N + 3}. In this paper, a novel ROM-less RNS-to-binary converter is proposed, using a new balanced moduli set {22n-1, 22n + 1, 2n-3, 2n + 3} for n even. The proposed converter is implemented with a two stage ROM-less approach, which computes the value of X based only in arithmetic operations, without using lookup tables. Experimental results for 24 to 120 bits of Dynamic Range, show that the proposed conve. http://hdl.handle.net/10400.21/4832.
10.1109/ISICIR.2014.7029521
Dias, Fábio; Miguens Matutino, Pedro; Barata, Manuel. 2014. Virtual laboratory for educational environments. In this paper a new simulation environment for a virtual laboratory to educational proposes is presented. The Logisim platform was adopted as the base digital simulation tool, since it has a modular implementation in Java. All the hardware devices used in the laboratory course was designed as components accessible by the simulation tool, and integrated as a library. Moreover, this new library allo. http://hdl.handle.net/10400.21/4848.
10.1109/REV.2014.6784252
Matutino, Pedro Miguens; Chaves, Ricardo; Sousa, Leonel. 2014. An efficient scalable RNS architecture for large dynamic ranges. This paper proposes an efficient scalable Residue Number System (RNS) architecture supporting moduli sets with an arbitrary number of channels, allowing to achieve larger dynamic range and a higher level of parallelism. The proposed architecture allows the forward and reverse RNS conversion, by reusing the arithmetic channel units. The arithmetic operations supported at the channel level include a. http://hdl.handle.net/10400.21/4787.
10.1007/s11265-014-0875-2

Activities

Supervision

	Thesis Title Role	Degree Subject (Type) Institution / Organization
2009 - 2009	Tracking de linha de alta tensão usando câmara de vídeo Supervisor	Engenharia Informática e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2009 - 2009	Analisador e Interpretador de Protocolos de Comunicação RS232 Supervisor	Engenharia Eletrónica e Telecomunicações e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2008 - 2008	Rede de Estações Meteorológicas Supervisor	Engenharia Eletrónica e Telecomunicações e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2008 - 2008	Detecção de anomalias em Linhas de Alta Tensão Supervisor	Engenharia de Sistemas de Telecomunicações e Electrónica (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2008 - 2008	Designador de posições GPS por observação remota Supervisor	Engenharia Eletrónica e Telecomunicações e de Computadores Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2008 - 2008	WebDomus – Interface Web Genérica para sistemas de Domótica Supervisor	Engenharia Informática e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2007 - 2007	Sistema de segurança para embarcações Supervisor	Engenharia Eletrónica e Telecomunicações e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2007 - 2007	Alinhamento automático de antenas Supervisor	Engenharia Eletrónica e Telecomunicações e de Computadores (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2006 - 2006	Interface Remota para Sistema Domótica Supervisor	Engenharia de Sistemas de Telecomunicações e Electrónica (Degree) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal