Identification
Personal identification
- Full name
- Filipe Azevedo
Citation names
- Azevedo, Filipe
- Parrado de Azevedo, Filipe
Author identifiers
- Ciência ID
- 7B11-1614-A9B6
Email addresses
- filipepazevedo@gmail.com (Professional)
Languages
| Language | Speaking | Reading | Writing | Listening | Peer-review |
|---|---|---|---|---|---|
| Portuguese (Mother tongue) | |||||
| English | Advanced (C1) | Proficiency (C2) | Advanced (C1) | Proficiency (C2) | Advanced (C1) |
| Japanese | Elementary (A2) | Elementary (A2) | Elementary (A2) | Elementary (A2) |
Education
| Degree | Classification | |
|---|---|---|
|
2024 - 2029
Ongoing
|
Engenharia Electrotécnica e de Computadores (Doutoramento)
Major in Electronic Design Automation
Universidade de Lisboa Instituto Superior Técnico, Portugal
Instituto de Telecomunicações Lisboa, Portugal "Generative AI Solutions for Analog Integrated Circuit Design" (THESIS/DISSERTATION)
|
|
|
2017/09 - 2020/04
Concluded
|
Engenharia Informática e de Computadores (Mestrado)
Major in "Information and Language Processing Technology" and "Algorithms and Programming"
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Evaluating Value-Wise Poison Values for the LLVM Compiler" (THESIS/DISSERTATION)
|
16 |
|
2014/09 - 2017/07
Concluded
|
Engenharia Informática e de Computadores (Licenciatura)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
16 |
Affiliation
Science
| Category Host institution |
Employer | |
|---|---|---|
| 2024/01/08 - Current | Researcher (Research) | Instituto de Telecomunicações Lisboa, Portugal |
| Universidade de Lisboa Instituto Superior Técnico, Portugal |
Other Careers
| Category Host institution |
Employer | |
|---|---|---|
| 2021/01 - 2024/01 | Consultor de Informática (Categorias e Funções Especificas) | Deloitte Portugal, Portugal |
Projects
Contract
| Designation | Funders | |
|---|---|---|
| 2024/01 - Current | Generative AI for Analog Chip Design
IT/SONY_AVGS
Instituto de Telecomunicações Lisboa, Portugal
|
Sony Advanced Visual Sensing AG
Ongoing
|
| 2025/02/01 - 2026/07/31 | Acelerando as Futuras Implementações de 5G/6G com Circuitos Integrados de Ondas Milimétricas Gerados por Visão Computacional
Profunda
2023.11981.PEX
PhD Student Fellow
Instituto de Telecomunicações Lisboa, Portugal
|
Fundação para a Ciência e a Tecnologia
Ongoing
|
Outputs
Publications
| Book |
|
| Conference paper |
|
| Journal article |
|
| Thesis / Dissertation |
|
Activities
Supervision
| Thesis Title Role |
Degree Subject (Type) Institution / Organization |
|
|---|---|---|
| 2024 - 2025 | Agents that Design Circuits: Reinforcement Learning Approach to Analog Integrated Circuit Design Automation
Co-supervisor
|
Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
| 2024 - 2025 | Speeding-Up PVT-Inclusive Analog/RF IC Sizing Optimizations With Artificial Neural Network based Performance Regressors and
Transfer Learning
Co-supervisor
|
Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
Jury of academic degree
| Topic Role |
Candidate name (Type of degree) Institution / Organization |
|
|---|---|---|
| 2025/12/23 | Using Variational Autoencoders to Address the Inverse Sizing Design Problem of Analog Integrated Circuits
Thesis Member
|
Liu Han (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
| 2025/12/23 | Design of Robust Electronic Circuits with Reinforcement Learning
Thesis Member
|
Yue Zhao (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
| 2025/12/23 | A Study of Different VAE–MLP-based Architectures for Post-Layout Performance Prediction of Analog Integrated Circuits
Thesis Member
|
Jiwang Zhou (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
Conference scientific committee
| Conference name | Conference host | |
|---|---|---|
| 2025 - 2025 | International Conference on Computer-Aided Design (ICCAD) | Munich |
| 2025 - 2025 | International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD) | Istanbul |
| 2024 - 2025 | Design, Automation & Test in Europe (DATE) | Lyon |
Distinctions
Other distinction
| 2020 | Diploma de Mérito Académico
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
| 2017 | Diploma de Mérito Académico
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
| 2016 | Diploma de Mérito Académico
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
