Identification
Personal identification
- Full name
- Rui Silva Ferreira
Citation names
- Ferreira, Rui
Author identifiers
- Ciência ID
- 6916-DCC5-4B80
Knowledge fields
- Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Computer Hardware and Architecture
Languages
Language | Speaking | Reading | Writing | Listening | Peer-review |
---|---|---|---|---|---|
Portuguese (Mother tongue) | |||||
English | Advanced (C1) | Advanced (C1) | Advanced (C1) | Advanced (C1) | Advanced (C1) |
Education
Degree | Classification | |
---|---|---|
2022/09/03 - 2024/06/26
Concluded
|
Mestrado Engenharia Eletrotécnica e Computadores (Mestrado)
Major in Sistemas de Computação
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Evaluation of Real-time Operating System in RISC-V" (THESIS/DISSERTATION)
|
15 |
2018/09 - 2022/07
Concluded
|
Licenciatura Bolonha em Engenharia Eletrotécnica e de Computadores (Licenciatura)
Universidade de Lisboa Instituto Superior Técnico, Portugal
|
13 |
Affiliation
Science
Category Host institution |
Employer | |
---|---|---|
2024/08/01 - 2026/01/31 | Research Trainee (Research) | Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal |
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal |
Projects
Contract
Designation | Funders | |
---|---|---|
2024/08/01 - Current | NEUROPULS
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
|
Europe Horizons
Ongoing
|
Outputs
Publications
Conference paper |
|
Activities
Supervision
Thesis Title Role |
Degree Subject (Type) Institution / Organization |
|
---|---|---|
2025/02/17 - Current | Neuromorphic Accelerator Based on RISC-V for AI Applications
Co-supervisor
|
Mestrado em Engenharia Eletrotecnica e Computadores (Master)
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Universidade de Lisboa Instituto Superior Técnico, Portugal |
2025/02/10 - Current | Implementation of a RISC-V based system on FPGA
Co-supervisor
|
Mestrado em Engenharia Eletrotecnica e Computadores (Master)
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Universidade de Lisboa Instituto Superior Técnico, Portugal |
Event participation
Activity description Type of event |
Event name Institution / Organization |
|
---|---|---|
2024/12/08 - 2024/12/11 | Third project general assembly of the Neuropuls Project, where I was responsible for presenting INSEC-ID development regarding
Task 6.6 of the project, Physical proof-of-concept implementation.
Meeting
|
Project General Assembly of Neuropuls Project (third)
Università degli Studi di Verona, Italy
|