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Identification

Personal identification

Full name
Marcelino Bicho dos Santos

Citation names

  • Santos, Marcelino

Author identifiers

Ciência ID
3015-3309-DCE7
ORCID iD
0000-0002-2091-1165
Google Scholar ID
https://scholar.google.com/citations?user=yokttVAAAAAJ&hl=pt-PT
Researcher Id
C-9693-2010
Scopus Author Id
7402562421

Telephones

Mobile phone
  • 917834039 (Personal)

Addresses

  • R. Alves Redol, 9, 1000-029, Lisboa, Lisboa, Portugal (Professional)

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Electrical and Electronic Engineering

Languages

Language Speaking Reading Writing Listening Peer-review
English Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1)
French Intermediate (B1) Elementary (A2) Beginner (A1) Intermediate (B1)
Spanish; Castilian Intermediate (B1) Intermediate (B1) Beginner (A1) Upper intermediate (B2)
Portuguese (Mother tongue)
Education
Degree Classification
2011/03/14 - 2011/03/15
Concluded
Engenharia Eletrotécnica e de Computadores (Título de Agregado)
Major in Eletrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
2001
Concluded
Engenharia Electrotécnica e de Computadores (Doutoramento)
Major in Sem especialidade
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Preparação do Teste de Sistemas Digitais a Nível de Transferência de Registos para Detecção de Defeitos Físicos" (THESIS/DISSERTATION)
Affiliation

Teaching in Higher Education

Category
Host institution
Employer
2023/10/01 - Current Full Professor (University Teacher) Universidade de Lisboa Instituto Superior Técnico, Portugal
Universidade de Lisboa Instituto Superior Técnico, Portugal
2017/04/05 - 2023/09/30 Associate Professor (University Teacher) Universidade de Lisboa Instituto Superior Técnico, Portugal
2013 - 2017/04/05 Assistant Professor (University Teacher) Universidade de Lisboa Instituto Superior Técnico, Portugal
Projects

Contract

Designation Funders
2023/10/30 - 2027/10/30 Building a Digitally-Supported Education Ecosystem for Next Generation Microelectronics Experts in Sustainable Chips and Applications for a Green and Circular Economy
Principal investigator
Universidade de Lisboa Instituto Superior Técnico, Portugal
European Health and Digital Executive Agency
Ongoing
2021/01/01 - 2023/12/31 Patient and Environment Aware Adaptive Intelligent Sensor Systems
Researcher
Universidade de Lisboa Instituto Superior Técnico, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2020/07/01 - 2023/09/30 Moore for Medical
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2014/12/01 - 2016/06/30 Projeto Analógico e Misto Estatisticamente Otimizado
CMUP-EPB/TIC/0038/2013
Instituto de Engenharia de Sistemas e Computadores, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Universidade do Porto Faculdade de Engenharia, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2012/01/11 - 2015/04/10 AUXILIAR AUDITIVO MONOLÍTICO COM MEMS
PTDC/EEA-ELC/122505/2010
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2011/01/01 - 2013/12/31 Integração de Módulos de Gestão de Energia com Rendimento Elevado
PTDC/EEA-ELC/113902/2009
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2009/01/01 - 2012/03/31 Nanoelectrónica para aplicações na indústria automovel SE2A
ENIAC/NTec/0002/2008
INESC Microsistemas e Nanotecnologias, Portugal

INOV INESC INOVAÇÃO - Instituto de Novas Tecnologias, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2007/09/01 - 2010/12/31 ICONS- Estimulador Neuronal Intra Cortex Visual
PTDC/EEA-ELC/68972/2006
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

INESC Microsistemas e Nanotecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2007/09/01 - 2010/08/31 Regulador de tensão DC-DC integrado em tecnologia CMOS de baixa tensão
PTDC/EEA-ELC/71412/2006
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2005/05/01 - 2008/04/30 idd - Teste de CIs Digitais CMOS em Corrente
POSC/EEA-ESE/55794/2004
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2005/01/01 - 2008/03/31 Teste Dinâmico de Sistemas Integrados em Nanotecnologias
POSC/EEA-ESE/57405/2004
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Universidade do Algarve, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2006/09/01 - 2007/10/31 Colaboração na Experiência CMS no CERN
POCI/FP/63922/2005
Laboratório de Instrumentação e Física Experimental de Partículas Coimbra, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2005/08/01 - 2006/09/30 Colaboração na Experiência CMS no CERN
POCI/FP/63434/2005
Laboratório de Instrumentação e Física Experimental de Partículas Coimbra, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
Outputs

Publications

Book
  1. Semião, J.; Cabral, R.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. Performance sensor for reliable operation. 2018.
    10.1007/978-3-319-92052-8_28
  2. Dias, N.; Santos, M.; Lima, F.; Borges, B.; Paisana, J.. Monolithic multi-mode DC-DC converter with gate voltage optimization. 2009.
    10.1007/978-3-540-95948-9_26
  3. VAZQUEZ, JC; CHAMPAC, V; ZIESEMER, AM; REIS, R; TEIXEIRA, IC; SANTOS, MB; TEIXEIRA, JP. Built-In Aging Monitoring for Safety-Critical Applications. 2009.
    10.1109/IOLTS.2009.5195976
  4. SEMIAO, J; FREIJEDO, J; RODRIGUEZ-ANDINA, J; VARGAS, F; SANTOS, M; TEIXEIRA, I; TEIXEIRA, P. Delay-Fault Tolerance to Power Supply Voltage Disturbances Analysis in Nanometer Technologies. 2009.
    10.1109/IOLTS.2009.5196020
  5. ROCHA, J; DIAS, N; MONTEIRO, A; NEVES, A; SANTOS, G; SANTOS, M; TEIXEIRA, JP. Controllability and Observability in Mixed Signal Cores. 2009.
    10.1109/IOLTS.2009.5196012
  6. ROCHA, J; SANTOS, M; SANTOS, G; MONTEIRO, A; NEVES, A; BRAGA, P. Limiting Internal Supply Voltage Spikes in DC-DC Converters. 2009.
    10.1109/ISIE.2009.5222413
  7. SEMIAO, J; FREIJEDO, J; MORAES, M; MALLMANN, M; ANTUNES, C; BENFICA, J; VARGAS, F; et al. Measuring Clock-Signal Modulation Efficiency for Systems-on-Chip in Electromagnetic Interference Environment. 2009.
    10.1109/LATW.2009.4813817
  8. DUARTE, R; PAISANA, J; SANTOS, M; LIMA, F. Adjustable Low Consumption Circuit for Monitorization of Power Source Voltages in a SoC. 2008.
  9. SEMIAO, J; FREIJEDO, J; ANDINA, J; VARGAS, F; SANTOS, M; TEIXEIRA, I; TEIXEIRA, P. Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits. 2008.
  10. SEMIAO, J; RODRIGUEZ-ANDINA, JJ; VARGAS, F; SANTOS, M; TEIXEIRA, I; TEIXEIRA, P; STRAUBE, B; et al. Process tolerant design using thermal and power-supply tolerance in pipeline based circuits. 2008.
  11. SEMIAO, J; FREIJEDO, J; MORAES, M; MALLMANN, M; ANTUNES, C; ROCHA, L; BENFICA, J; et al. Power-Supply Instability Aware Clock Signal Modulation for Digital Integrated Circuits. 2008.
  12. Parreira, A.; Teixeira, J.P.; Santos, M.B.. FPGAs BIST evaluation. 2004.
Book chapter
  1. Semião, Jorge; Santos, Luís; Santos, Marcelino B.. "DRAM Performance Sensor". In Universal Access in Human-Computer Interaction. Novel Design Approaches and Technologies, 510-521. Springer International Publishing, 2022.
    10.1007/978-3-031-05028-2_34
  2. J. Semião; H. Santos; R. Cabral; M. B. Santos; P. Teixeira. "PVTA-Aware Performance SRAM Sensor for IoT Applications". 2020.
    10.1007/978-3-030-30938-1_27
  3. Semião, J.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Internet of things and artificial intelligence—a wining partnership?". 369-390. 2020.
    10.1007/978-3-030-44907-0_15
  4. DIAS, N; SANTOS, M; LIMA, F; BORGES, B; PAISANA, J. "Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization". 258-267. 2009.
    10.1007/978-3-540-95948-9_26
Conference paper
  1. Santos, Carlos; Fernandes, Jorge; Santos, Marcelino; Martins, Ricardo. "Paving the Way for the Electronic Design Automation of Power Management Units". 2023.
    10.1109/smacd58065.2023.10192230
  2. Domingos, Diogo; Santos, Marcelino. "Asynchronous Controller Design and Simulation Using Signal Transition Graphs". 2022.
    10.1109/dcis55711.2022.9970038
  3. Santos, Carlos; Fernandes, Jorge; Santos, Marcelino. "Load Optimized Gate Driving for Charge Pumps". 2022.
    10.1109/dcis55711.2022.9970011
  4. Semiao, J.; Santos, L.; Santos, M.B.. "SRAM Performance Sensor". 2021.
    10.1109/DCIS53048.2021.9666163
  5. Leitao, J.M.; Chaves, R.; Santos, M.B.. "Applying Model Checking in the Verification of a Clock Masking Unit". 2019.
    10.1109/DCIS201949030.2019.8959910
  6. Capeleiro, R.B.; Santos, M.B.. "Low noise, high efficiency, segmented LCD drivers for ultra-low power applications in 22 nm FD-SOI". 2019.
    10.1109/DCIS.2018.8681488
  7. Capeleiro, R.; Leitão, J.M.; Chaves, R.; Santos, M.B.. "Low-power frequency monitoring circuit for clock failure detection". 2019.
    10.1109/DCIS.2018.8681489
  8. Santos, H.; Semiao, J.; Cabral, R.; Romao, A.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Aging and performance sensor for SRAM". 2017.
    10.1109/DCIS.2016.7845354
  9. "Statistically Enhanced Analogue and Mixed-Signal Design and Test". 2016.
    10.1109/IMS3TW.2016.7524221
  10. Vazquez, J.C.; Champac, V.; Ziesemer, A.M.; Reis, R.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Delay sensing for parametric variations and defects monitoring in safety-critical applications". 2016.
    10.1109/LASCAS.2010.7410250
  11. Ventura, J.; Moita, T.H.; Dos Santos, M.B.. "Characterization of temperature sensors using Peltier cells". 2016.
    10.1109/IMS3TW.2016.7524220
  12. Domingues, T.; Santos, M.; Tavares, G.. "A Click Modulation Audio Player". 2016.
    10.1109/DCIS.2015.7388602
  13. Jacinto, B.; Santos, M.. "Digital Sliding Mode Control with non-linear ADC". 2016.
    10.1109/DCIS.2015.7388609
  14. Pereira, M.S.; Costa, J.E.N.; Santos, M.; Vaz, J.C.. "A 1.1 µa Voltage Reference Circuit With High Psrr and Temperature Compensation". 2016.
    10.1109/DCIS.2015.7388564
  15. Martins, R.; Lourenco, N.; Horta, N.; Guerreiro, N.; Santos, M.. "Embedding Fault List Compression Techniques in a Design Automation Framework for Analog And Mixed-signal Structural Testing". 2016.
    10.1109/DCIS.2015.7388584
  16. Leong, C.; Semiao, J.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.; Batista, A.J.N.; Goncalves, B.; Marques, J.G.. "Fast Radiation Monitoring in FPGA-based Designs". 2016.
    10.1109/DCIS.2015.7388590
  17. Leong, C.; Semião, J.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Fault-tolerance in FPGA focusing power reduction or performance enhancement". 2015.
    10.1109/LATW.2015.7102523
  18. Vazquez-Hernandez, J.; Champac, V.; Dos Santos, M.B.. "Error prediction and detection methodologies for reliable circuit operation under NBTI". 2015.
    10.1109/TEST.2014.7035364
  19. Santos, M.B.; Medeiros, M.; Garcia, E.C.. "Thermal loads simulation array in a typical satellite thermal control surface". 2015.
  20. Semiao, J.; Saraiva, D.; Leong, C.; Romao, A.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Performance sensor for tolerance and predictive detection of delay-faults". 2014.
    10.1109/DFT.2014.6962092
  21. Domingues, T.; Santos, M.; Tavares, G.. "Low frequency PWM modulation for high efficiency Class-D audio driving". 2014.
    10.1109/DCIS.2014.7035571
  22. Semiao, J.; Leong, C.; Romao, A.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Aging-aware dynamic voltage or frequency scaling". 2014.
    10.1109/DCIS.2014.7035599
  23. Guerreiro, N.; Santos, M.; Teixeira, P.. "Fault list compression for efficient analogue and mixed-signal production test preparation". 2014.
    10.1109/DCIS.2014.7035567
  24. Moreira, C.; Santos, M.. "Implicit current DC-DC Digital Voltage-Mode Control". 2014.
    10.1109/ISIE.2014.6864815
  25. Dias, N.; Santos, M.. "Efficiency optimization of multi-mode monolithic DC-DC converters". 2014.
    10.1109/DCIS.2014.7035569
  26. Rabuske, T.; Fernandes, J.; Rabuske, F.; Rodrigues, C.; Dos Santos, M.B.. "A self-calibrated 10-bit 1 MSps SAR ADC with reduced-voltage charge-sharing DAC". 2013.
    10.1109/ISCAS.2013.6572375
  27. Leong, C.; Semiao, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.; Valdes, M.; Freijedo, J.; Rodriguez-Andina, J.J.; Vargas, F.. "Aging monitoring with local sensors in FPGA-based designs". 2013.
    10.1109/FPL.2013.6645596
  28. Costa, T.; Piedade, M.S.; Santos, M.. "An ultra-low noise current source for magnetoresistive biosensors biasing". 2012.
    10.1109/BioCAS.2012.6418507
  29. Pachito, J.; Martins, C.V.; Semiao, J.; Santos, M.; Teixeira, I.C.; Teixeira, J.P.. "The influence of clock-gating on NBTI-induced delay degradation". 2012.
    10.1109/IOLTS.2012.6313842
  30. Martins, C.V.; Semião, J.; Vazquez, J.C.; Champac, V.; Santos, M.; Teixeira, I.C.; Teixeira, J.P.. "Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors". 2011.
    10.1109/VTS.2011.5783784
  31. Da Rocha, J.F.; Dos Santos, M.B.; Costa, J.M.D.. "Analysis of a monolithic buck converter's pMOS switch during turn off". 2011.
    10.1109/EUROCON.2011.5929347
  32. Moreira, C.O.; Silva, F.A.; Pinto, S.F.; Santos, M.B.. "Digital LQR control with Kalman Estimator for DC-DC Buck converter". 2011.
    10.1109/EUROCON.2011.5929326
  33. Esteves, J.O.M.; Moita, T.H.; Almeida, C.B.; Dos Santos, M.B.. "ICT: Interface software for the characterization and test of mixed-signal power cores". 2011.
    10.1109/IOLTS.2011.5993843
  34. Guerreiro, N.; Santos, M.. "Mixed-signal fault equivalence: Search and evaluation". 2011.
    10.1109/ATS.2011.19
  35. Oliveira, R.S.; Semião, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications". 2011.
    10.1109/LATW.2011.5985919
  36. Pinto, M.; Ribeiro, H.; Borges, B.; Santos, M.. "A resonant, frequency - Tracking, step-down piezoelectric transformer based converter". 2010.
    10.1109/ECCE.2010.5618112
  37. Moita, T.H.; Almeida, C.B.; Dos Santos, M.B.. "DETECTOR: Design and test characterization of mixed-signal power cores". 2010.
    10.1109/IMS3TW.2010.5503014
  38. Vazquez, J.C.; Champac, V.; Ziesemer Jr., A.M.; Reis, R.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Low-sensitivity to process variations aging sensor for automotive safety-critical applications". 2010.
    10.1109/VTS.2010.5469568
  39. Vazquez, J.C.; Champac, V.; Ziesemer Jr., A.M.; Reis, R.; Semião, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Predictive error detection by on-line aging monitoring". 2010.
    10.1109/IOLTS.2010.5560241
  40. Vazquez, J.C.; Champac, V.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Programmable aging sensor for automotive safety-critical applications". 2010.
  41. Semiao, J.; Freijedo, J.; Moraes, M.; Mallmann, M.; Antunes, C.; Benfica, J.; Vargas, F.; et al. "Measuring clock-signal modulation efficiency for systems-on-chip in electromagnetic interference environment". 2009.
    10.1109/LATW.2009.4813817
  42. Rocha, J.; Dias, N.; Monteiro, A.; Neves, A.; Santos, G.; Santos, M.; Teixeira, J.P.. "Controllability and observability in mixed signal cores". 2009.
    10.1109/IOLTS.2009.5196012
  43. Semião, J.; Freijedo, J.; Rodriguez-Andina, J.; Vargas, F.; Santos, M.; Teixeira, I.; Teixeira, P.. "Delay-fault tolerance to power supply voltage disturbances analysis in nanometer technologies". 2009.
    10.1109/IOLTS.2009.5196020
  44. Rocha, J.; Santos, M.; Santos, G.; Monteiro, Â.; Neves, A.; Braga, P.. "Limiting internal supply voltage spikes in DC-DC converters". 2009.
    10.1109/ISIE.2009.5222413
  45. Sádio, V.A.L.; Parreira, A.E.M.; Santos, M.B.. "A 100 mA fractional step-down charge pump with digital control". 2009.
    10.1117/12.822917
  46. Vazquez, J.C.; Champac, V.; Ziesemer Jr., A.M.; Reis, R.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Built-in aging monitoring for safety-critical applications". 2009.
    10.1109/IOLTS.2009.5195976
  47. Duarte, R.; Paisana, J.; Santos, M.; Lima, F.. "Adjustable low consumption circuit for monitorization of power source voltages in a SoC". 2008.
    10.1109/APCCAS.2008.4746038
  48. Semião, J.; Freijedo, J.; Andina, J.; Vargas, F.; Santos, M.; Teixeira, I.; Teixeira, P.. "Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits". 2008.
    10.1109/IOLTS.2008.51
  49. Semião, J.; Freijedo, J.; Moraes, M.; Mallmann, M.; Antunes, C.; Rocha, L.; Benfica, J.; et al. "Power-supply instability aware clock signal modulation for digital integrated circuits". 2008.
    10.1109/EMCEUROPE.2008.4786876
  50. Semião, J.; Rodriguez-Andina, J.J.; Vargas, F.; Santos, M.; Teixeira, I.; Teixeira, P.. "Process tolerant design using thernal and power-supply tolerance in pipeline based circuits". 2008.
    10.1109/DDECS.2008.4538752
  51. Rocha, J.; Santos, M.; Dores Costa, J.M.; Lima, F.. "4.2V tolerant buck converter in a standard 3.3V 0.13µm CMOS technology". 2007.
    10.1109/POWERENG.2007.4380187
  52. Lima, F.; Santos, M.; Barata, J.; Aguiar, J.. "Dead-time control system for a synchronous buck DC-DC converter". 2007.
    10.1109/POWERENG.2007.4380181
  53. Semião, J.; Freijedo, J.; Rodríguez-Andina, J.J.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Improving tolerance to power-supply and temperature variations in synchronous circuits". 2007.
    10.1109/DDECS.2007.4295299
  54. Semião, J.; Freijedo, J.; Rodríguez-Andina, J.J.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "On-line dynamic delay insertion to improve signal integrity in synchronous circuits". 2007.
    10.1109/IOLTS.2007.49
  55. Semião, J.; Freijedo, J.; Rodríguez Andina, J.J.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Enhancing the tolerance to power-supply instability in digital circuits". 2007.
    10.1109/ISVLSI.2007.44
  56. Rocha, J.; Santos, M.; Costa, J.M.D.; Lima, F.. "High voltage tolerant level shifters and DCVSL in standard low voltage CMOS technologies". 2007.
    10.1109/ISIE.2007.4374695
  57. Semiao, J.; Rodriguez-Andina, J.J.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Improving the tolerance of pipeline based circuits to power supply or temperature variations". 2007.
    10.1109/DFT.2007.60
  58. Almeida, J.S.; Santos, M.B.; Panissi, D.L.; Garcia, E.C.. "Qualification of infrared array grid using tubular heaters as a reliable tool on space simulation". 2007.
  59. Fernandes, J.M.; Santos, M.B.; Oliveira, A.L.; Teixeira, J.C.. "DFT and probabilistic testability analysis at RTL". 2006.
    10.1109/HLDVT.2006.320002
  60. Rodriguez-Irago, M.; Andina, J.J.R.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Dynamic fault test and diagnosis in digital systems using multiple clock schemes and multi-VDD test". 2005.
    10.1109/IOLTS.2005.25
  61. Fernandes, J.M.; Santos, M.B.; Oliveira, A.L.; Teixeira, J.C.. "A probabilistic method for the computation of testability of RTL constructs". 2004.
    10.1109/DATE.2004.1268845
  62. Alemany, R.; Almeida, C.B.; Almeida, N.; Bercher, M.; Benetta, R.; Bexiga, V.; Bourotte, J.; et al. "Overview of the ECAL off-detector electronics of the CMS experiment". 2004.
  63. Júnior, D.B.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Modeling and simulation of time domain faults in digital systems". 2004.
  64. Almeida, J.S.; Santos, M.B.; Panissi, D.; Garcia, E.C.. "Effectiveness of low-cost thermal vacuum test of micro-satellites". 2003.
  65. Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.; Manich, S.; Rodriguez, R.; Figueras, J.. "RTL level preparation of high-quality / low-energy / low-power BIST". 2002.
  66. Santos, M.B.; Gonçalves, F.M.; Teixeira, I.C.; Teixeira, J.P.. "Implicit functionality and multiple branch coverage (IFMB): A testability metric for RT-level". 2001.
  67. Santos, M.B.; Goncalves, F.M.; Teixeira, I.C.; Teixeira, J.P.. "Defect-oriented Verilog fault simulation of SoC macros using a stratified fault sampling technique". 1999.
  68. Girard, P.; Guiller, L.; Landrault, C.; Pravossoudovitch, S.; Figueras, J.; Manich, S.; Teixeira, P.; Santos, M.. "Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity". 1999.
  69. Santos, M.B.; Goncalves, F.M.; Ohletz, M.; Teixeira, J.P.. "Defect-oriented testing of analogue and mixed signal ICs". 1998.
  70. Goncalves, F.M.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Defect-oriented test quality assessment using fault sampling and simulation". 1998.
  71. Santos, M.B.; Simoes, M.; Teixeira, I.; Teixeira, J.P.. "Test preparation for high coverage of physical defects in CMOS digital ICs". 1995.
  72. Casimiro, A.P.; Santos, M.B.; Goncalves, F.; Teixeira, J.P.. "On the analysis of routing, cells and adjacency faults in CMOS digital circuits". 1994.
  73. Santos, M.B.; Goncalves, F.M.; Sousa, J.J.T.; Teixeira, J.P.. "Layout-level techniques for testability improvement of MOS physical designs". 1992.
Journal article
  1. Banganho, Antonio; Santos, Marcelino; da Silva, Hugo Placido. "Electrodermal activity: Fundamental principles, measurement, and application". IEEE Potentials 41 5 (2022): 35-43. http://dx.doi.org/10.1109/mpot.2020.2983381.
    10.1109/mpot.2020.2983381
  2. Banganho, A.R.; Dos Santos, M.B.; Da Silva, H.P.. "Design and Evaluation of an Electrodermal Activity Sensor (EDA) with Adaptive Gain". IEEE Sensors Journal 21 6 (2021): 8639-8649. http://www.scopus.com/inward/record.url?eid=2-s2.0-85099583153&partnerID=MN8TOARS.
    10.1109/JSEN.2021.3050875
  3. Jacinto, Bruno; Santos, Marcelino; IEEE. "Digital Sliding Mode Control With non-linear ADC". 2015 Conference on Design of Circuits and Integrated Systems (DCIS) (2015): http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000380543200054&KeyUID=WOS:000380543200054.
    10.1109/DCIS.2015.7388609
  4. Domingues, Tiago; Santos, Marcelino; Tavares, Goncalo; IEEE. "A Click Modulation Audio Player". 2015 Conference on Design of Circuits and Integrated Systems (DCIS) (2015): http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000380543200047&KeyUID=WOS:000380543200047.
    10.1109/DCIS.2015.7388602
  5. Leong, C.; Semiao, J.; Santos, M. B.; Teixeira, I. C.; Teixeira, J. P.. "Fault-Tolerance in Field Programmable Gate Array with Dynamic Voltage and Frequency Scaling". Journal of Low Power Electronics 11 4 (2015): 517-527. http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000410307100008&KeyUID=WOS:000410307100008.
    10.1166/jolpe.2015.1406
  6. Leong, C.; Semiao, J.; Santos, M. B.; Teixeira, I. C.; Teixeira, J. P.; Batista, A. J. N.; Goncalves, B.; Marques, J. G.; IEEE. "Fast Radiation Monitoring in FPGA-based Designs". 2015 Conference on Design of Circuits and Integrated Systems (Dcis) (2015): http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000380543200035&KeyUID=WOS:000380543200035.
    10.1109/DCIS.2015.7388590
  7. Leong, C.; Semiao, J.; Santos, M. B.; Teixeira, I. C.; Teixeira, J. P.; IEEE. "Fault-Tolerance in FPGA Focusing Power Reduction or Performance Enhancement". 2015 16th Latin-American Test Symposium (Lats) (2015): http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000380400700043&KeyUID=WOS:000380400700043.
  8. Parreira, A.; Lima, F.; Santos, M.. "Digital modular control of high frequency DC-DC converters". Microelectronics Journal 45 10 (2014): 1254-1260. http://www.scopus.com/inward/record.url?eid=2-s2.0-84908686347&partnerID=MN8TOARS.
    10.1016/j.mejo.2013.12.002
  9. Vazquez, J.C.; Champac, V.; Semião, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Process variations-aware statistical analysis framework for aging sensors insertion". Journal of Electronic Testing: Theory and Applications (JETTA) 29 3 (2013): 289-299. http://www.scopus.com/inward/record.url?eid=2-s2.0-84880076511&partnerID=MN8TOARS.
    10.1007/s10836-013-5358-z
  10. Esteves, J.; Pereira, J.; Paisana, J.; Santos, M.. "Ultra low power capless LDO with dynamic biasing of derivative feedback". Microelectronics Journal 44 2 (2013): 94-102. http://www.scopus.com/inward/record.url?eid=2-s2.0-84872908469&partnerID=MN8TOARS.
    10.1016/j.mejo.2012.10.010
  11. Moita, T.H.; Almeida, C.B.; Dos Santos, M.B.. "Activic: Design-based automatic characterization of mixed-signal integrated circuits". Journal of Low Power Electronics 9 1 (2013): 73-88. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878484921&partnerID=MN8TOARS.
    10.1166/jolpe.2013.1242
  12. Sádio, Valter; Rein, Fabian; Münker, Christian; Santos, Marcelino. "Modeling of Inherent Losses of Fully Integrated Switched Capacitor DC-DC Converters". Journal of Low Power Electronics 9 1 (2013): 15-15. http://dblp.uni-trier.de/db/journals/jolpe/jolpe8.html#SadioRMS12.
  13. Sádio, Valter; Rein, Fabian; Münker, Christian; Santos, Marcelino. "Modeling of Inherent Losses of Fully Integrated Switched Capacitor DC-DC Converters". Journal of Low Power Electronics 9 1 (2013): 15-15. http://dblp.uni-trier.de/db/journals/jolpe/jolpe8.html#SadioRMS12.
  14. Pachito, J.; Martins, C.V.; Jacinto, B.; Semião, J.; Vazquez, J.C.; Champac, V.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Aging-aware power or frequency tuning with predictive fault detection". IEEE Design and Test of Computers 29 5 (2012): 27-36. http://www.scopus.com/inward/record.url?eid=2-s2.0-84873052843&partnerID=MN8TOARS.
    10.1109/MDT.2012.2206009
  15. Vazquez, J.C.; Champac, V.; Ziesemer Jr., A.M.; Reis, R.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "Delay sensing for long-term variations and defects monitoring in safety-critical applications". Analog Integrated Circuits and Signal Processing 70 2 (2012): 249-263. http://www.scopus.com/inward/record.url?eid=2-s2.0-84898603620&partnerID=MN8TOARS.
    10.1007/s10470-011-9789-0
  16. Sadio, V.; Rein, F.; Munker, C.; Santos, M.. "Modeling of inherent losses of fully integrated switched capacitor DC-DC converters". Journal of Low Power Electronics 8 5 (2012): 667-673. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877724453&partnerID=MN8TOARS.
    10.1166/jolpe.2012.1224
  17. Pachito, J.; Martins, C. V.; Semiao, J.; Santos, M.; Teixeira, I. C.; Teixeira, J. P.; IEEE. "The Influence of Clock-Gating On NBTI-Induced Delay Degradation". 2012 Ieee 18th International on-Line Testing Symposium (Iolts) (2012): 61-66. http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000312722700011&KeyUID=WOS:000312722700011.
  18. Jacinto, B.; Moreira, C.; Santos, M.. "Digital Sliding Mode Control of DC-DC Buck converters". Journal of Low Power Electronics 7 2 (2011): 218-233. http://www.scopus.com/inward/record.url?eid=2-s2.0-84856954512&partnerID=MN8TOARS.
    10.1166/jolpe.2011.1130
  19. Rolo, M.D.; Alves, L.N.; Martins, E.V.; Rivetti, A.; Santos, M.B.; Varela, J.. "A low-noise CMOS front-end for TOF-PET". Journal of Instrumentation 6 9 (2011): http://www.scopus.com/inward/record.url?eid=2-s2.0-80053907468&partnerID=MN8TOARS.
    10.1088/1748-0221/6/09/P09003
  20. Da Rocha, J.F.; Dos Santos, M.B.; Costa, J.M.D.. "Smart control of internal supply voltage spikes in a low voltage DC-DC buck converter". Journal of Low Power Electronics 7 3 (2011): 426-443. http://www.scopus.com/inward/record.url?eid=2-s2.0-84857220808&partnerID=MN8TOARS.
    10.1166/jolpe.2011.1146
  21. Oliveira, R.S.; Semião, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.. "On-line BIST for performance failure prediction under NBTI-induced aging in safety-critical applications". Journal of Low Power Electronics 7 4 (2011): 562-572. http://www.scopus.com/inward/record.url?eid=2-s2.0-84857267074&partnerID=MN8TOARS.
    10.1166/jolpe.2011.1155
  22. Martins, C. V.; Semiao, J.; Vazquez, J. C.; Champac, V.; Santos, M.; Teixeira, I. C.; Teixeira, J. P.; IEEE Computer Soc. "Adaptive Error-Prediction Flip-flop for Performance Failure Prediction with Aging Sensors". 2011 Ieee 29th Vlsi Test Symposium (Vts) (2011): 203-208. http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000300521100038&KeyUID=WOS:000300521100038.
  23. Angelo, M.; Santos, M.; Neves, A.; Dias, N.. "Noise minimization for low power bandgap reference and low dropout regulator cores". Journal of Low Power Electronics 5 2 (2009): 206-222. http://www.scopus.com/inward/record.url?eid=2-s2.0-70350064448&partnerID=MN8TOARS.
    10.1166/jolpe.2009.1021
  24. Dias, N.; Santos, M.; Monteiro, A.; Braga, P.; Neves, A.. "Gate driver voltage optimization for multi-mode low power DC-DC conversion". Journal of Low Power Electronics 5 2 (2009): 241-254. http://www.scopus.com/inward/record.url?eid=2-s2.0-70350041884&partnerID=MN8TOARS.
    10.1166/jolpe.2009.1024
  25. Dias, Nuno; Santos, Marcelino B; Monteiro, Angelo; Braga, Pedro; Neves, Alexandre. "Gate Driver Voltage Optimization for Multi-Mode Low Power DC-DC Conversion". JOLPE: Journal of Low Power Electronics 5 2 (2009): 13-13.
    10.1166/jolpe.2009.1024
  26. Monteiro, Angelo; Santos, Marcelino B; Neves, Alexandre; Dias, Nuno. "Noise Minimization for Low Power Bandgap Reference and Low Dropout Regulator Cores". JOLPE: Journal of Low Power Electronics  5 2 (2009): 16-16.
    10.1166/jolpe.2009.1021
  27. Monteiro, Angelo; Santos, Marcelino B; Neves, Alexandre; Dias, Nuno. "Noise Minimization for Low Power Bandgap Reference and Low Dropout Regulator Cores". JOLPE: Journal of Low Power Electronics  5 2 (2009): 16-16.
    10.1166/jolpe.2009.1021
  28. Dias, Nuno; Santos, Marcelino B; Monteiro, Angelo; Braga, Pedro; Neves, Alexandre. "Gate Driver Voltage Optimization for Multi-Mode Low Power DC-DC Conversion". JOLPE: Journal of Low Power Electronics 5 2 (2009): 13-13.
    10.1166/jolpe.2009.1024
  29. Chatrchyan, S.; Hmayakyan, G.; Khachatryan, V.; Sirunyan, A.M.; Adam, W.; Bauer, T.; Bergauer, T.; et al. "The CMS experiment at the CERN LHC". Journal of Instrumentation 3 8 (2008): http://www.scopus.com/inward/record.url?eid=2-s2.0-67650317516&partnerID=MN8TOARS.
    10.1088/1748-0221/3/08/S08004
  30. Semião, J.; Freijedo, J.F.; Rodriguez-Andina, J.J.; Vargas, F.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Time Management for Low-Power Design of Digital Systems". Journal of Low Power Electronics 4 3 (2008): 410-419. http://www.scopus.com/inward/record.url?eid=2-s2.0-67649562607&partnerID=MN8TOARS.
    10.1166/jolpe.2008.194
  31. da Rocha, J.F.; dos Santos, M.B.; Costa, J.M.D.; Lima, F.A.. "Level shifters and DCVSL for a low-voltage CMOS 4.2-V buck converter". IEEE Transactions on Industrial Electronics 55 9 (2008): 3315-3323. http://www.scopus.com/inward/record.url?eid=2-s2.0-51449098788&partnerID=MN8TOARS.
    10.1109/TIE.2008.927974
  32. Semião, J.F.L.C.; Irago, M.J.R.; Rodrïuez-Andina, J.J.; Piccoli, L.B.; Vargas, F.L.; dos Santos, M.B.; Teixeira, I.M.C.; Teixeira, J.P.. "Signal integrity enhancement in digital circuits". IEEE Design and Test of Computers 25 5 (2008): 452-461. http://www.scopus.com/inward/record.url?eid=2-s2.0-55349113251&partnerID=MN8TOARS.
    10.1109/MDT.2008.146
  33. SEMIAO, JFLC; IRAGO, MJR; RODRIGUEZ-ANDINA, JJ; PICCOLI, LB; VARGAS, FL; DOS SANTOS, MB; TEIXEIRA, IMC; TEIXEIRA, JP. "Signal integrity enhancement in digital circuits". Ieee Design & Test of Computers 25 5 (2008): 452-461. http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000259673900007&KeyUID=WOS:000259673900007.
  34. Semião, Jorge; Freijedo, Judit F.; Rodriguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.. "Time Management for Low-Power Design of Digital Systems". Journal Low Power Electronics 4 3 (2008): 9-9.
  35. Bayatian, G.L.; Chatrchyan, S.; Hmayakyan, G.; Sirunyan, A.M.; Adam, W.; Bergauer, T.; Dragicevic, M.; et al. "CMS physics technical design report, volume II: Physics performance". Journal of Physics G: Nuclear and Particle Physics 34 6 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-34247648309&partnerID=MN8TOARS.
    10.1088/0954-3899/34/6/S01
  36. d'Enterria, D.; Ballintijn, M.; Bedjidian, M.; Hofman, D.; Kodolova, O.; Loizides, C.; Lokthin, I.P.; et al. "CMS physics technical design report: Addendum on high density QCD with heavy ions". Journal of Physics G: Nuclear and Particle Physics 34 11 (2007): 2307-2455. http://www.scopus.com/inward/record.url?eid=2-s2.0-35548973987&partnerID=MN8TOARS.
    10.1088/0954-3899/34/11/008
  37. Santos, M.B.; Teixeira, J.P.. "Functional-oriented mask-based built-in self-test". IET Computers and Digital Techniques 1 5 (2007): 491-498. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548767615&partnerID=MN8TOARS.
    10.1049/iet-cdt:20060073
  38. Adzic, P.; Alemany-Fernandez, R.; Almeida, C.B.; Almeida, N.M.; Anagnostou, G.; Anfreville, M.G.; Anicin, I.; et al. "Energy resolution of the barrel of the CMS Electromagnetic Calorimeter". Journal of Instrumentation 2 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-34247343357&partnerID=MN8TOARS.
  39. Almeida, N.; Da Silva, J.C.; Alemany, R.; Almeida, C.; Santos, M.; Teixeira, I.; Teixeira, J.P.; Varela, J.. "Calorimeter trigger synchronization in the CMS experiment". Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 568 2 (2006): 634-641. http://www.scopus.com/inward/record.url?eid=2-s2.0-33750838275&partnerID=MN8TOARS.
    10.1016/j.nima.2006.08.032
  40. Almeida, J.S.; Santos, M.B.; Panissi, D.L.; Garcia, E.C.. "Effectiveness of low-cost thermal vacuum tests of a micro-satellite". Acta Astronautica 59 6 (2006): 483-489. http://www.scopus.com/inward/record.url?eid=2-s2.0-33745962607&partnerID=MN8TOARS.
    10.1016/j.actaastro.2006.03.003
  41. Adzic, P.; Alemany-Fernandez, R.; Almeida, C.B.; Almeida, N.M.; Anagnostou, G.; Anfreville, M.G.; Anicin, I.; et al. "Reconstruction of the signal amplitude of the CMS electromagnetic calorimeter". European Physical Journal C 46 SUPPL. 1 (2006): 23-35. http://www.scopus.com/inward/record.url?eid=2-s2.0-33751062160&partnerID=MN8TOARS.
    10.1140/epjcd/s2006-02-002-x
  42. Adam, W.; Bergauer, T.; Deldicque, C.; Erö, J.; Fruehwirth, R.; Jeitler, M.; Kastner, K.; et al. "The CMS high level trigger". European Physical Journal C 46 3 (2006): 605-667. http://www.scopus.com/inward/record.url?eid=2-s2.0-33744805076&partnerID=MN8TOARS.
    10.1140/epjc/s2006-02495-8
  43. Júnior, D.B.; Rodriguez-Irago, M.; Santos, M.B.; Teixeira, I.C.; Vargas, F.; Teixeira, J.P.. "Fault modeling and simulation of power supply voltage transients in digital systems on a chip". Journal of Electronic Testing: Theory and Applications (JETTA) 21 4 (2005): 349-363. http://www.scopus.com/inward/record.url?eid=2-s2.0-23944526350&partnerID=MN8TOARS.
    10.1007/s10836-005-0972-z
  44. Alemany, R.; Almeida, C.B.; Almeida, N.; Bercher, M.; Benetta, R.; Bexiga, V.; Bourotte, J.; et al. "Overview of the ECAL off-detector electronics of the CMS experiment". IEEE Transactions on Nuclear Science 52 5 III (2005): 1918-1924. http://www.scopus.com/inward/record.url?eid=2-s2.0-29144455019&partnerID=MN8TOARS.
    10.1109/TNS.2005.856596
  45. Adzic, P.; Alemany-Fernandez, R.; Almeida, C.B.; Almeida, N.M.; Anagnostou, G.; Anfreville, M.G.; Anicin, I.; et al. "Results of the first performance tests of the CMS electromagnetic calorimeter". European Physical Journal C 44 SUPPL. 2 (2005): 1-10. http://www.scopus.com/inward/record.url?eid=2-s2.0-30044445538&partnerID=MN8TOARS.
    10.1140/epjcd/s2005-02-011-3
  46. Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.; Manich, S.; Balado, L.; Figueras, J.. "On high-quality, low energy built-in self test preparation at RT-level". Journal of Electronic Testing: Theory and Applications (JETTA) 20 4 (2004): 345-355. http://www.scopus.com/inward/record.url?eid=2-s2.0-4444319505&partnerID=MN8TOARS.
    10.1023/B:JETT.0000039603.89172.2e
  47. Parreira, A.M.; Teixeira, J.P.; Dos Santos, M.B.. "Built-in self-test quality assessment using Hardware Fault Emulation in FPGAS". Computing and Informatics 23 5-6 (2004): 537-556. http://www.scopus.com/inward/record.url?eid=2-s2.0-21644471028&partnerID=MN8TOARS.
  48. Santos, M.B.; Gonçalves, F.M.; Teixeira, I.C.; Teixeira, J.P.. "RTL design validation, DFT and test pattern generation for high defects coverage". Journal of Electronic Testing: Theory and Applications (JETTA) 18 2 (2002): 179-187. http://www.scopus.com/inward/record.url?eid=2-s2.0-0036534503&partnerID=MN8TOARS.
    10.1023/A:1014997610714
  49. Gonçalves, F.M.; Santos, M.B.; Teixeira, I.C.; Teixeira, J.P.. "Design and test of a certifiable ASIC for a safety-critical gas burner control system". Journal of Electronic Testing: Theory and Applications (JETTA) 18 3 (2002): 285-294. http://www.scopus.com/inward/record.url?eid=2-s2.0-0036605297&partnerID=MN8TOARS.
    10.1023/A:1015083105421
  50. Santos, M.B.; Gonçalves, F.M.; Teixeira, I.C.; Teixeira, J.P.. "RTL-based functional test generation for high defects coverage in digital systems". Journal of Electronic Testing: Theory and Applications (JETTA) 17 3-4 (2001): 311-319. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035373022&partnerID=MN8TOARS.
    10.1023/A:1012223614418
  51. Manich, S.; Gabarró, A.; Lopez, M.; Figueras, J.; Girard, P.; Guiller, L.; Landrault, C.; et al. "Low power BIST by filtering non-detecting vectors". Journal of Electronic Testing: Theory and Applications (JETTA) 16 3 (2000): 193-202. http://www.scopus.com/inward/record.url?eid=2-s2.0-0033689730&partnerID=MN8TOARS.
    10.1023/A:1008331029249
  52. Saraiva, M.; Santos, M.B.; Casimiro, A.P.; Teixeira, I.M.; Teixeira, J.P.. "On the design of a highly testable cell library". Microprocessing and Microprogramming 35 1-5 (1992): 383-389. http://www.scopus.com/inward/record.url?eid=2-s2.0-0026915042&partnerID=MN8TOARS.
    10.1016/0165-6074(92)90343-6

Other

Other output
  1. Programmable aging sensor for automotive safety-critical applications. 2010. Vázquez, Julio César; Champac, Víctor H.; Teixeira, Isabel C.; Santos, Marcelino B; Teixeira, João Pauloaging sensor for automotive safety-critical applications. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5457131&isnumber=5456897.
  2. Programmable aging sensor for automotive safety-critical applications. 2010. Vázquez, Julio César; Champac, Víctor H.; Teixeira, Isabel C.; Santos, Marcelino B; Teixeira, João Pauloaging sensor for automotive safety-critical applications. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5457131&isnumber=5456897.