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João Goes graduated from Instituto Superior Técnico (IST), Lisbon, in Electrical and Computer Engineering (ECE), in 1992. He obtained the M.Sc. and the Ph.D. degrees in ECE, respectively, in 1996 and 2000, from the Technical University of Lisbon and the ‘Habilitation' degree, in Electronics, in 2012 from the NOVA University of Lisbon (NOVA). Since 1998 João Goes has been with the Department of Electrical and Computer Engineering (DEEC) of the School of Sciences and Technology of NOVA where he is a Full Professor. From 2012 till 2019 He headed the DEEC, comprising 50 professors and over 1000 students. From 2012 to 2017, he was the Director of the Centre of Technology and Systems (CTS) of the Research Institute for New Technologies (UNINOVA), leading nearly 50 Senior Researchers with a PhD, over 70 collaborators and more than 90 PhD students. Since 2023 he is the Executive Director of UNINOVA. He has been elected a member of the Scientific Council of FCT NOVA for 12 years, and he has been elected a member of the General Council of NOVA, the top governing body the University, for the 2022-2025 term. In 2003 he co-founded and served as CTO of ACACIA Semi. SA, a Portuguese engineering company specialized in high-performance analog front-end products (now RENESAS). From 1997 until 1998 João was Project Manager at CHIPIDEA SA (now SYNOPSYS). He was the first Engineer hired. From 1993 to 1997 he worked as a Researcher at Integrated Circuits and Systems Group (GCSI) at IST doing research on data converters and filters. Since 1992 he has participated and led several National and European projects in science, technology, networking, and training. He has been the Primary Investigator of over 20 projects. João Goes has published over 200 papers in international journals (50+) and IEEE leading conferences, he holds 4 international patents, and he is co-author of 8 books. He is the Portuguese researcher with more published papers in all IEEE flagship conferences (“Chip Olympics”), requiring silicon-proven integrated circuits (ICs), with measured performance beyond the state-of-the-art (ISSCC, VLSI, CICC and ESSCIRC). His research interests and contributions are in analog and mixed-signal (AMS) integrated circuit design, with special emphasis on sensor-to-digital and digital-to-actuator interfaces, data-converters (ADCs and DACs) and high-performance analog frontends (AFEs). Among several best-paper awards, he is co-author of the journal paper recipient (winner) of the 2012 IEEE CASS Outstanding Young Author Award and co-winner (1st place) of the first edition of the “Innovation Award INCM” in 2016. He was the Chairman of the IEEE CASS Analog Signal Processing Technical Committee, for the term 2013-2015. He was Associate Editor (AE) of IEEE Transactions on Circuits and Systems–II, for the period 2016-2023 and he is (2024 -) AE of IEEE Transactions on Circuits and Systems–I.
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Identification

Personal identification

Full name
João Carlos da Palma Goes

Citation names

  • Goes, João

Author identifiers

Ciência ID
3E1C-5E04-30D5
ORCID iD
0000-0002-8434-8391

Telephones

Mobile phone
  • 962686117 (Personal)

Addresses

  • Rua Vicente Dias, no. 12, 3º-D, 1400-358, Lisbon, Lisbon, Portugal (Personal)

Websites

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Electrical and Electronic Engineering

Languages

Language Speaking Reading Writing Listening Peer-review
Portuguese (Mother tongue)
English Proficiency (C2) Proficiency (C2) Proficiency (C2) Proficiency (C2) Proficiency (C2)
Italian Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2) Upper intermediate (B2)
Education
Degree Classification
2012
Concluded
 Ciências de Engenharia Electrotécnica e de Computadores (Título de Agregado)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
 Approved
2000
Concluded
 Engenharia Electrotécnica e de Computadores (Doutoramento)
Major in Electrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Optimization of Self-calibrated Cmos Pipelined Analogue-to-digital Converters" (THESIS/DISSERTATION)
 Approved
Affiliation

Teaching in Higher Education

Category
Host institution 		Employer
2018/01/01 - Current Full Professor (University Teacher) Universidade Nova de Lisboa, Portugal
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
1998/04/02 - Current Full Professor (University Teacher) Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
2017 - 2018 Associate Professor (University Teacher) Universidade Nova de Lisboa, Portugal
2013 - 2016 Associate Professor (University Teacher) Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal

Positions / Appointments

Category
Host institution 		Employer
2013 - 2019/12 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2017 - 2018 Coordenação ou direção de centro de investigação, departamento ou equivalente Universidade Nova de Lisboa, Portugal
2013 - 2014 Conselho científico/técnico-científico ou orgão correspondente Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Projects

Grant

Designation Funders
2025/03/01 - 2029/02/28 POEMS - Portuguese Competence Centre in Semiconductors
DIGITAL-Chips-2024-SG-CCC-1
Co-Principal Investigator (Co-PI)
UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 European Commission
Ongoing

Contract

Designation Funders
2025/05/01 - 2027/12/31 SECURE - Physically Unclonable Functions for Digital Secure Systems using hybrid technologies: printed-electronics and silicon CMOS
16881 / LISBOA2030-FEDER-00816400
UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Ongoing
2026/02/23 - 2027/08/22 Gerador de Relógio Multifase e Bloco de Entrada em Rádio Frequência Integrado para ADCs com Multiplexação em Frequência para Aplicações SerDes de 224 Gbps
2024.16986.PEX
10.54499/2024.16986.PEX
UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Ongoing
2022/10/10 - 2026/09/30 QUAD ADC - ESA contract no. 40001139457/22/NL/CRS
40001139457/22/NL/CRS
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
European Space Agency
Ongoing
2023/01/01 - 2025/12/31 Conceito multissensorial para elétrodos de bateria inteligentes para monitorização em funcionamento
2022.04012.PTDC
10.54499/2022.04012.PTDC
Universidade do Minho, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2021/01/01 - 2025/12/31 Laboratório Associado de Sistemas Inteligentes
LA/P/0104/2020
10.54499/LA/P/0104/2020
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Universidade de Aveiro Centro de Tecnologia Mecânica e Automação, Portugal

Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal

Universidade do Minho, Portugal

Universidade do Porto Faculdade de Ciências, Portugal

Universidade do Porto Centro de Matemática, Portugal

Instituto Politécnico do Cávado e do Ave, Portugal

Universidade do Porto Laboratório de Inteligência Artificial e Ciência de Computadores, Portugal

Universidade de Aveiro, Portugal

Universidade do Minho Instituto de Polímeros e Compósitos, Portugal

Universidade de Aveiro Instituto de Engenharia Eletrónica e Informática de Aveiro, Portugal

Universidade do Minho Centro ALGORITMI, Portugal

Universidade Nova de Lisboa Unidade de Investigação e Desenvolvimento em Engenharia Mecânica e Industrial, Portugal

Instituto Politécnico do Porto Instituto Superior de Engenharia do Porto, Portugal

Universidade de Coimbra, Portugal

Universidade de Coimbra Centro de Informatica e Sistemas, Portugal

Instituto Politécnico do Porto Grupo de Investigação em Engenharia e Computação Inteligente para a Inovação e o Desenvolvimento, Portugal

Universidade NOVA de Lisboa, Portugal

Universidade do Porto Faculdade de Engenharia, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2020/01/01 - 2024/12/31 Centre of Technology and Systems
UIDB/00066/2020
10.54499/UIDB/00066/2020
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2021/03/01 - 2024/02/29 Papel Inteligente para sistemas de identificação - IDS-Paper
PTDC/CTM-PAM/4241/2020
Universidade NOVA de Lisboa, Portugal

Instituto de Nanoestruturas Nanomodelação e Nanofabricação, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2020/01/26 - 2023/12/31 EUGreenGrid
Horizon 2020 Call: H2020-LC-GD-2020 (Building a low-carbon, climate resilient future: Research and innovation in support of the European Green Deal)
Universidade de Lisboa Centro de Investigação em Arquitetura Urbanismo e Design, Portugal
Ongoing
2020/05/01 - 2023/04/03 ESTAT - Eco Solar Transformer Architecture Technology
ESTAT - SEP-210725232
Universidade de Lisboa Centro de Investigação em Arquitetura Urbanismo e Design, Portugal
 EU Framework Programme for Research and Innovation Euratom
Ongoing
2020/04/01 - 2022/03/31 Blind Calibration of SAR-Assisted Time-Interleaved Pipeline ADCs using Advanced Machine-Learning Techniques
XILINX - 2
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Xilinx Inc
Ongoing
2019/02/01 - 2022/01/31 Data fusion of sensor networks and fire spread modelling for decision support in forest fire suppression.
PCIF/SSI/0102/2017
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Universidade de Aveiro, Portugal

Universidade Nova de Lisboa, Portugal

Universidade de Lisboa Instituto Superior de Agronomia, Portugal

Instituto de Telecomunicações, Portugal

Direção-Geral do Território, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2019/01/02 - 2021/01/01 IPSTERS - Sistema de Reconhecimento Terrestre do IPSentinel
DSAIPA/AI/0100/2018
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Direção-Geral do Território, Portugal

Universidade NOVA de Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2019/01/01 - 2019/12/31 Centro de Tecnologias e Sistemas (CTS)
UID/EEA/00066/2019
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2014 - 2017 INPACtOR - The future INterconnected Physical And Cyber wORlds
UID/EEA/00066/2014
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2013/04/01 - 2016/12/31 A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems.
EXCL/EEI-ELC/0261/2012
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto de Telecomunicações, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2011/02/01 - 2014/07/31 Detector de raios-X plano para aplicações em medicina MARx
PTDC/EEA-ELC/115577/2009
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2011/01/01 - 2013/12/31 Projecto Estratégico - UI 66 - 2011-2012
PEst-OE/EEI/UI0066/2011
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal

UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2010 - 2012 IMPACT - Inovações em amplificação paramétrica aplicada a circuitos integrados CMOS
PTDC/EEA-ELC/101421/2008
PTDC/EEA-ELC/101421/2008
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2007 - 2011 LEADER - Conversor Analógico-Digital de Baixa Energia com Resolução Efectiva Acrescida
PTDC/EEA-ELC/69791/2006
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2007 - 2010 High-Speed High-Resolution Radiation-Hardened ADC Technology
AO/1-4686/04/NL/HE
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 European Space Agency
Concluded
2005 - 2008 SIPHASE - PROJECTO DE CIRCUITOS EM CONDENSADORES COMUTADOS EM TECNOLOGIAS CMOS UTILIZANDO UMA ÚNICA FASE DE RELÓGIO
POSI/EEA-ESE/61863/2004
POSI/EEA-ESE/61863/2004
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2004 - 2006 SECA - Conversor A/D Concorrencial de Video, Auto-Calibrado, de Baixa Potência e de Baixa Tensão de Alimentação com Função de Auto-Teste
POCTI/ESE/47061/2002
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2002 - 2006 SAMBA - Módulo Inteligente de Interface Analógico-Digital para Aplicações Biomédicas
POCTI/ESE/41804/2001
Principal investigator
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded

Other

Designation Funders
2024/01/01 - 2025/12/31 OLI PUSH - ILLIANCE energy efficiency
10.54499/LA/P/0104/2020
Ongoing
2024/01/01 - 2025/12/31 ILLIANCE energy efficiency
10.54499/LA/P/0104/2020
Ongoing
Outputs

Publications

Book
  1. Advances in Analogue and Mixed-Signal Integrated Circuits for Space Applications. 2026.
    10.1007/978-3-032-14405-8
  2. Póvoa, R.F.S.; da Palma Goes, J.C.; Horta, N.C.G.. A new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain. 2018.
    10.1007/978-3-319-95207-9
  3. Martins, J.; Camarinha-Matos, L.M.; Goes, J.; Gomes, L.. Towards cloud-based engineering systems. 2015.
    10.1007/978-3-319-16766-4_1
  4. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Towards Collective Awareness Systems. 2014.
    10.1007/978-3-642-54734-1
  5. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. Contributing to the internet of things. 2013.
  6. Figueiredo, M.; Goes, J.; Evans, G.. Reference-Free CMOS Pipeline Analog-to-Digital Converters. 2013.
    10.1007/978-1-4614-3467-2
  7. Serra, H.; Paulino, N.; Goes, J.. A switched-capacitor band-pass biquad filter using a simple quasi-unity gain amplifier. 2013.
  8. Abdollahv, S.; Santos-Tavares, R.; Goes, J.. A low-voltage CMOS buffer for RF applications based on a fully-differential voltage-combiner. 2013.
  9. Bastos, I.; Querido, F.; Amoêdo, D.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. A 1.2 v low-noise-amplifier with double feedback for high gain and low noise figure. 2013.
  10. Pereira, N.; Oliveira, L.B.; Goes, J.. Design of cascode-based transconductance amplifiers with low-gain pvt variability and gain enhancement using a body-biasing technique. 2013.
  11. Oliveira, J.P.; Goes, J.. Parametric analog signal amplification applied to nanoscale CMOS technologies. 2012.
    10.1007/978-1-4614-1671-5
Book chapter
  1. Hugo Serra; Fábio Passos; Edgar Albuquerque; Nuno Paulino; Luís Bica Oliveira; João Pedro Oliveira; Paulo Santos; et al. "Design and Test of a Radiation-Hardened 14-Bit 80 MS/s SAR-Assisted Pipeline-ADC in 28-nm Bulk-CMOS". 2026.
    10.1007/978-3-032-14405-8_1
  2. Hugo Viana; Pedro Barquinha; João Goes. "A Comprehensive Study of the Reference Voltage Buffer Design for CR- and CS-Based SAR-ADCs". 2025.
    10.1007/978-3-031-97051-1_27
  3. Xavier, João; Barquinha, Pedro; Goes, João. "Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology". In Technological Innovation for Connected Cyber Physical Spaces, 279-289. Springer Nature Switzerland, 2023.
    10.1007/978-3-031-36007-7_21
  4. Leonardo, David; Goes, João. "An Energy-Efficient Wideband Input-Buffer for High-Speed CMOS ADCs". In Technological Innovation for Digitalization and Virtualization, 197-205. Springer International Publishing, 2022.
    10.1007/978-3-031-07520-9_18
  5. Campilho-Gomes, Miguel; Tavares, Rui; Goes, João. "Automatic Flat-Level Circuit Generation with Genetic Algorithms". In IFIP Advances in Information and Communication Technology, 101-108. Springer International Publishing, 2020.
    10.1007/978-3-030-45124-0_9
  6. Teixeira, Miguel Lima; Velez, Camilo; Li, Dian; Goes, João. "Microneedle Based ECG – Glucose Painless MEMS Sensor with Analog Front End for Portable Devices". In IFIP Advances in Information and Communication Technology, 463-478. Springer International Publishing, 2017.
    10.1007/978-3-319-56077-9_45
  7. Correia, Ana; Goes, João; Barquinha, Pedro. "Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters". In IFIP Advances in Information and Communication Technology, 533-541. Springer International Publishing, 2016.
    10.1007/978-3-319-31165-4_50
  8. Martins, Jorge; Barquinha, Pedro; Goes, João. "TCAD Simulation of Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors". In IFIP Advances in Information and Communication Technology, 551-557. Springer International Publishing, 2016.
    10.1007/978-3-319-31165-4_52
  9. Correia, Joana; Mancelos, Nuno; Goes, João. "Stability Improvements in a Rail-to-Rail Input/Output, Constant Gm Operational Amplifier, at 0.4 V Operation, Using the Low-Voltage DTMOS Technique". In Technological Innovation for Collective Awareness Systems, 585-591. Springer Berlin Heidelberg, 2014.
    10.1007/978-3-642-54734-8_65
  10. Serra, Hugo; Paulino, Nuno; Goes, João. "A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier". In IFIP Advances in Information and Communication Technology, 582-589. Springer Berlin Heidelberg, 2013.
    10.1007/978-3-642-37291-9_63
  11. Abdollahvand, S.; Santos-Tavares, R.; Goes, João. "A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner". In IFIP Advances in Information and Communication Technology, 611-618. Springer Berlin Heidelberg, 2013.
    10.1007/978-3-642-37291-9_66
  12. Bastos, Ivan; Querido, F.; Amoêdo, D.; Oliveira, Luis B.; Oliveira, J. P.; Goes, João; Silva, Manuel M.. "A 1.2 V Low-Noise-Amplifier with Double Feedback for High Gain and Low Noise Figure". In IFIP Advances in Information and Communication Technology, 573-581. Springer Berlin Heidelberg, 2013.
    10.1007/978-3-642-37291-9_62
  13. Pereira, Nuno; Oliveira, Luis B.; Goes, João. "Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique". In IFIP Advances in Information and Communication Technology, 590-599. Springer Berlin Heidelberg, 2013.
    10.1007/978-3-642-37291-9_64
  14. Paulino, N.; Garção, A.S.; Goes, J.. "UWB Signals and Systems". 5-47. 2008.
    10.1007/978-1-4020-8410-2_2
  15. Paulino, N.; Garção, A.S.; Goes, J.. "Introduction". 1-3. 2008.
    10.1007/978-1-4020-8410-2_1
  16. Paulino, N.; Garção, A.S.; Goes, J.. "Digitally Programmable Delay". 115-166. 2008.
    10.1007/978-1-4020-8410-2_4
  17. Paulino, N.; Garção, A.S.; Goes, J.. "UWB RADAR Receiver Architecture". 49-114. 2008.
    10.1007/978-1-4020-8410-2_3
  18. Paulino, N.; Garção, A.S.; Goes, J.. "Transceiver Prototype and Experimental Results". 167-209. 2008.
    10.1007/978-1-4020-8410-2_5
  19. Paulino, N.; Garção, A.S.; Goes, J.. "Conclusions". 211-213. 2008.
    10.1007/978-1-4020-8410-2_6
Conference paper
  1. Cabacinho, João; Sousa, Diogo; Marcelino, João; Fernandes, Marco; Barquinha, Pedro; Goes, João; Casaleiro, João; Oliveira, Luis Bica. "Design of a TRNG in 600-nm IGZO-TFT FlexICs for Secure IoT Applications". Paper presented in 2025 IEEE International Symposium on Circuits and Systems (ISCAS), London, 2025.
    10.1109/iscas56072.2025.11043564
  2. Goes, J.. "Energy-Efficient and High-Performance Data Converters". 2024.
    10.23919/MIXDES62605.2024.10614045
  3. Dias, D.; Goes, J.; Costa, T.. "A PVT-Robust Open-loop Gm-Ratio ×16 Gain Residue Amplifier for >1 GS/s Pipelined ADCs". 2024.
    10.1109/ISCAS58744.2024.10558154
  4. Arvana, M.; Goes, J.; Rocha, A.D.. "Modular and Configurable Internet of Things Devices for Value Chain Digitalization". 2024.
    10.1007/978-3-031-63851-0_21
  5. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "Chairs' Message". 2023.
    10.1109/ESSDERC59256.2023.10268541
  6. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "ESSDERC 2023 Program". 2023.
    10.1109/ESSDERC59256.2023.10268563
  7. Da Franca, J.E.; Goes, J.; De La Rosa, J.M.; Cathelin, A.; Fernandes, J.; Oliveira, J.P.; Otin, A.; et al. "Chairs' Message". 2023.
    10.1109/ESSCIRC59616.2023.10268747
  8. Leonardo, D.; Xavier, J.; Oliveira, J.; Goes, J.. "A Skew-Insensitive Switched Source-Follower Analog Frontend for Time-Interleaved ADCs". 2023.
    10.1109/PRIME58259.2023.10161843
  9. Xavier, J.; Leonardo, D.; Barquinha, P.; Goes, J.. "Predictive Integrators with Thermal Noise Cancellation". 2023.
    10.1109/ISCAS46773.2023.10181999
  10. Teixeira, M.L.; Oliveira, J.P.; Principe, J.C.; Goes, J.. "A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire ATC for Biological and Low-Frequency Signals". 2023.
    10.1109/BioCAS58349.2023.10388601
  11. Sebastião, D.; Goes, J.. "Design of an 20 GHz Wide-Band Input Buffer". 2023.
    10.1109/ICECS58634.2023.10382798
  12. Dias, D.; Goes, J.; Costa, T.. "A Parasitic Resistance Extraction Tool Leveraged by Image Processing". 2022.
    10.1109/ISCAS48785.2022.9937879
  13. Correia, Ana; Tavares, Vitor Grade; Barquinha, Pedro; Goes, Joao. "Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers". 2021.
    10.1109/dcis53048.2021.9666176
  14. Xavier, Joao; Barquinha, Pedro; Goes, Joao. "Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS". Vila do Conde, 2021.
    10.1109/dcis53048.2021.9666185
  15. Wadhwa, N.; Bahubalindruni, P.; Correia, A.; Goes, J.; Deb, S.; Barquinha, P.. "Mostly passive ¿ - s ADC with a-IGZO TFTs for flexible electronics". 2021.
    10.1109/ISCAS51556.2021.9401704
  16. Goes, Joao; Tardivel, Benjamin; de Melo, Joao; Marques, Joao. "A Temperature-Compensated Class-AB Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs". Paper presented in IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
    10.1109/iscas45731.2020.9180530
  17. Goes, J.; Tardivel, B.; de Melo, J.; Marques, J.. "A temperature-compensated class-AB parametric residue amplifier for SAR-assisted pipeline ADCs". 2020.
  18. Sniatala, P.; Makowski, D.; Goes, J.; Machowski, W.; Arriaran, S.S.. "Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques". 2019.
    10.23919/MIXDES.2019.8787142
  19. Póvoa, R.; Canelas, A.; Martins, R.; Horta, N.; Lourenço, N.; Goes, J.. "A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers". 2019.
    10.1109/SMACD.2019.8795248
  20. Correia, A.; Barquinha, P.; Marques, J.; Goe, J.. "A High-resolution ¿-Modulator ADC with Oversampling and Noise-shaping for IoT". 2018.
    10.1109/PRIME.2018.8430338
  21. Sniatala, P.; Kropidlowski, M.; Szczesny, S.; Goes, J.; Paulino, N.; Pedro Oliveira, J.. "Current Mode Sigma-Delta Modulators Designed for Amperometry Based Medical Sensors". 2018.
    10.1109/ICSES.2018.8507330
  22. Keragodu, T.; Tiwari, B.; Nishtha; Bahubalindruni, P.; Goes, J.; Barquinha, P.. "A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors". 2018.
    10.1109/ISCAS.2018.8351175
  23. Ferreira, B.; Fernades, M.; Oliveira, L.; Goes, J.. "Impact of VCO non-linearities on VCO-based sigma-delta modulator ADCs". 2018.
    10.1109/YEF-ECE.2018.8368946
  24. Póvoa, R.; Canelas, A.; Martins, R.; Lourenço, N.; Horta, N.; Goes, J.. "A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits". 2017.
    10.1109/PRIME.2017.7974122
  25. Singh, S.; Bahubalindruni, P.; Goes, J.. "A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs". 2017.
    10.1109/ISCAS.2017.8050490
  26. Pereira, N.; Serra, H.; Goes, J.. "A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC". 2017.
    10.1109/ISCAS.2017.8050563
  27. Nowacki, B.; Paulino, N.; Goes, J.. "A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ?SM". 2016.
    10.1109/ISSCC.2016.7418013
  28. Fernandes, M.D.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.. "Design of a low phase error multiphase clock generator for modern wideband receivers". 2016.
    10.1109/PRIME.2016.7519504
  29. Bahubalindruni, P.G.; Goes, J.; Barquinha, P.. "A high-gain, high-speed parametric residue amplifier for SAR-assisted pipeline ADCs". 2016.
    10.1109/SMACD.2016.7520732
  30. Sniatala, P.; Handkiewicz, A.; Goes, J.; Paulino, N.; Oliveira, J.P.. "Fully differential sigma-delta modulator structure for current-mode sensors". 2016.
    10.1109/ICSES.2016.7593816
  31. Fernandes, M.D.; Oliveira, L.B.; Goes, J.. "Wideband noise cancelling balun LNA with feedback biasing". 2016.
    10.1109/ISCAS.2016.7527226
  32. Oliveira, J.P.; Goes, J.. "Advanced amplification techniques for nanoscale CMOS in the context of IoT node sensors". 2016.
    10.1109/MIXDES.2016.7529692
  33. Póvoa, R.; Lourenço, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner". 2015.
    10.1109/ICECS.2014.7049972
  34. Pereira, N.; Goes, J.; Rodrigues, M.; Faria, P.. "A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance". 2015.
    10.1109/ICECS.2014.7050000
  35. Correia, A.; Martins, R.; Fortunato, E.; Barquinha, P.; Goes, J.. "Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors". 2015.
    10.1109/ISCAS.2015.7168620
  36. Abdollahvand, S.; Paulino, N.; Gomes, L.; Goes, J.. "A current-mode VCO-based amplifier-less 2nd-order ¿S modulator with over 85dB SNDR". 2015.
    10.1109/ISCAS.2015.7169077
  37. De Melo, J.L.A.; Goes, J.; Paulino, N.. "A 0.7 v 256 µw ¿S modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW". 2015.
    10.1109/VLSIC.2015.7231294
  38. Povoa, R.; Lourenco, N.; Horta, N.; Goes, J.. "A voltage-combiners-biased amplifier with enhanced gain and speed using current starving". 2015.
    10.1109/ISCAS.2015.7169085
  39. Goes, J.; Häfliger, P.. "Technical Program Co-Chairs Message". 2015.
    10.1109/ISCAS.2015.7168555
  40. Abdollahvand, S.; Oliveira, L.B.; Gomes, L.; Goes, J.. "A low-voltage voltage-controlled ring-oscillator employing dynamic-threshold-MOS and body-biasing techniques". 2015.
    10.1109/ISCAS.2015.7168878
  41. Serra, H.; Santos-Tavares, R.; Goes, J.. "Automatic design of high-order SC filter circuits". 2015.
    10.1109/ISCAS.2015.7169052
  42. De Melo, J.L.A.; Leitao, P.V.; Goes, J.; Paulino, N.. "A simple clab-D audio power amplifier using a pabive CT S¿ modulator for medium quality sound systems". 2015.
    10.1109/MIXDES.2015.7208582
  43. Pereira, N.; Goes, J.; Oliveira, L.B.; Dinis, R.. "Analog-to-Digital Converters with embedded if mixing using variable reference voltages". 2014.
    10.1109/ISCAS.2014.6865072
  44. De Melo, J.L.A.; Querido, F.; Paulino, N.; Goes, J.. "A 0.4-V 410-nW opamp-less continuous-time S¿ modulator for biomedical applications". 2014.
    10.1109/ISCAS.2014.6865391
  45. Sniatala, P.; Naumowicz, M.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "A hybrid current-mode passive second-order continuous-time S¿ modulator". 2014.
    10.1109/MIXDES.2014.6872168
  46. Nowacki, B.; Paulino, N.; Goes, J.. "A low power 4th order MASH switched-capacitor S¿ modulator using ultra incomplete settling". 2014.
    10.1109/ISCAS.2014.6865392
  47. Povoa, R.; Lourenco, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners". 2013.
    10.1109/VLSI-SoC.2013.6673238
  48. Vaz, B.; Goes, J.; Paulino, N.; Steiger-Garcao, A.. "Design of a 1.8V, 10-bit 130+MS/S time-interleaved non-scaled pipeline adc in 0.18 µm cmos". 2005.
  49. Galhardo, A.; Goes, J.; Vaz, B.; Paulino, N.. "Design of low-voltage low-power pipeline adcs using a single-phase scheme". 2005.
  50. Evans, G.; Goes, João; Unterweissacher, M; Paulino, Nuno. "1.5 V CMOS Gaussian and uniform noise generators for BISC/BIST of ADCs". Paper presented in AVLSIWS 2005 ¿ IEEJ International Analog VLSI Workshop, Bordeaux, 2005.
    Published
  51. Unterweissacher, M; Goes, João; Evans, G.. "A low voltage CMOS Gaussian noise generator". Paper presented in Austrochip 2003 Conference, Linz, 2003.
    Published
  52. Goes, J.; Vital, J.C.; Alves, L.; Ferreira, N.; Ventura, P.; Bach, E.; Franca, J.E.; Koch, R.. "A low-power 14-b 5 MS/s CMOS pipeline ADC with background analog self-calibration". 2000.
Journal article
  1. Miguel Tavares; José Gerald; João Goes. "The probability density function of spectral correlation function estimates". EURASIP Journal on Advances in Signal Processing (2025): http://dx.doi.org/10.1186/s13634-025-01241-8.
    10.1186/s13634-025-01241-8
  2. Miguel Lima Teixeira; João P. Oliveira; José C. Príncipe; João Goes. "A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire Analog-to-Time Converter for Biological and Low-Frequency Signals — Comparison With Analog Version". IEEE Transactions on Biomedical Circuits and Systems (2024): https://doi.org/10.1109/TBCAS.2024.3422282.
    10.1109/TBCAS.2024.3422282
  3. Houda Harkat; Luis M. Camarinha-Matos; João Goes; Hasmath F.T. Ahmed. "Cyber-physical systems security: A systematic review". Computers & Industrial Engineering (2024): https://doi.org/10.1016/j.cie.2024.109891.
    10.1016/j.cie.2024.109891
  4. João Goes; José de la Rosa; Andreia Cathelin; Jorge Fernandes; João Oliveira; Luís Bica de Oliveira; Nuno Paulino. "IEEE SSCS–EDS ESSCIRC–ESSDERC 2023 [Conference Reports]". IEEE Solid-State Circuits Magazine (2024): https://doi.org/10.1109/MSSC.2023.3332272.
    10.1109/MSSC.2023.3332272
  5. Goes, João; de la Rosa, José; Cathelin, Andreia; Fernandes, Jorge; Oliveira, João; de Oliveira, Luís Bica; Paulino, Nuno. "IEEE SSCS-EDS ESSCIRC-ESSDERC 2023". IEEE Solid-State Circuits Magazine 16 1 (2024): 72-74. http://dx.doi.org/10.1109/mssc.2023.3332272.
    10.1109/mssc.2023.3332272
  6. Miguel Campilho-Gomes; Rui Tavares; João Goes. "Analog Flat-Level Circuit Synthesis With Genetic Algorithms". IEEE Access (2024): https://doi.org/10.1109/ACCESS.2024.3446308.
    10.1109/ACCESS.2024.3446308
  7. Ana Correia; Vítor Grade Tavares; Pedro Barquinha; João Goes. "All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications". Journal of Low Power Electronics and Applications (2022): https://doi.org/10.3390/jlpea12040064.
    10.3390/jlpea12040064
  8. Tavares, Miguel; Gerald, José; Goes, João. "Zoom discrete spectral correlation function, with application to cyclostationary signal detection". Digital Signal Processing 121 (2022): 103316. http://dx.doi.org/10.1016/j.dsp.2021.103316.
    10.1016/j.dsp.2021.103316
  9. Fonte, P.J.R.; Martinho, A.; Pereira, A.; Gomes, A.; Neves, Â.; Abrunhosa, A.; Bugalho, A.; et al. "Robust, maintainable, emergency invasive mechanical ventilator". Revista Brasileira de Terapia Intensiva 34 3 (2022): 351-359. http://www.scopus.com/inward/record.url?eid=2-s2.0-85141509993&partnerID=MN8TOARS.
    10.5935/0103-507X.20220383-en
  10. Shrivastava, S.; Bahubalindruni, P.G.; Goes, J.. "A Pulse Width Modulator Using a High-Speed Comparator with Flexible Oxide TFT Technology". IEEE Solid-State Circuits Letters 5 (2022): 288-291. http://www.scopus.com/inward/record.url?eid=2-s2.0-85144751412&partnerID=MN8TOARS.
    10.1109/LSSC.2022.3228072
  11. Paulo J. R. Fonte; Alberto Martinho; Américo Pereira; Andreia Gomes; Ângela Neves; Antero Abrunhosa; António Bugalho; et al. "Ventilador mecânico invasivo de emergência resistente e de fácil manutenção". Revista Brasileira de Terapia Intensiva 34 3 (2022): http://dx.doi.org/10.5935/0103-507x.20220383-pt.
    10.5935/0103-507x.20220383-pt
  12. Tiwari, B.; Bahubalindruni, P.G.; Shrivastava, S.; Goes, J.. "Mixed-Signal Building Blocks for Communication Systems Using Flexible Oxide TFT Technology". IEEE Journal on Flexible Electronics 1 4 (2022): 223-230. http://www.scopus.com/inward/record.url?eid=2-s2.0-85168164158&partnerID=MN8TOARS.
    10.1109/JFLEX.2022.3220719
  13. Francisco Sandro Rodrigues Holanda; Maria Hosana dos Santos; Janisson Batista de Jesus; Wadson De Menezes Santos; Edinaldo De Oliveira Alves Sena; Thiago Xavier Chagas; João Horácio Dantas Almeida de Goes; Luiz Diego Vidal Santos. "Sediment input from the São Francisco River bank, Northeast Brazil, under low discharge period". Investigaciones Geográficas (2021): https://doi.org/10.14350/rig.60244.
    10.14350/rig.60244
  14. Carlos Silva; Jorge Martins; Jonas Deuermeier; Maria Elias Pereira; Ana Rovisco; Pedro Barquinha; João Goes; et al. "Towards Sustainable Crossbar Artificial Synapses with Zinc-Tin Oxide". Electronic Materials (2021): https://doi.org/10.3390/electronicmat2020009.
    10.3390/electronicmat2020009
  15. Camarinha-Matos, Luis M.; Goes, João; Gomes, Luis; Pereira, Pedro. "Soft and Transferable Skills Acquisition through Organizing a Doctoral Conference". Education Sciences 10 9 (2020): 235. http://dx.doi.org/10.3390/educsci10090235.
    Published • 10.3390/educsci10090235
  16. Pereira, Nuno; Goes, João. "A charge-sharing analog-to-digital converter with embedded downconversion using a variable reference voltage". International Journal of Circuit Theory and Applications (2020): http://dx.doi.org/10.1002/cta.2793.
    10.1002/cta.2793
  17. Povoa, Ricardo; Lourenco, Nuno; Martins, Ricardo; Canelas, Antonio; Horta, Nuno; Goes, Joao. "A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. http://dx.doi.org/10.1109/tcsii.2019.2913083.
    10.1109/tcsii.2019.2913083
  18. Tiwari, B.; Bahubalindruni, P.G.; Goes, J.; Barquinha, P.. "Positive-negative DC-DC converter using amorphous-InGaZnO TFTs". International Journal of Circuit Theory and Applications 48 3 (2020): 394-405. http://www.scopus.com/inward/record.url?eid=2-s2.0-85078657350&partnerID=MN8TOARS.
    10.1002/cta.2743
  19. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.; Goes, J.. "A folded voltage-combiners biased amplifier for low voltage and high energy-efficiency applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. http://www.scopus.com/inward/record.url?eid=2-s2.0-85071531251&partnerID=MN8TOARS.
    10.1109/TCSII.2019.2913083
  20. Póvoa, R.; Canelas, A.; Martins, R.; Horta, N.; Lourenço, N.; Goes, J.. "A new family of CMOS inverter-based OTAs for biomedical and healthcare applications". Integration 71 (2020): 38-48. http://www.scopus.com/inward/record.url?eid=2-s2.0-85076903851&partnerID=MN8TOARS.
    10.1016/j.vlsi.2019.12.004
  21. Tiwari, B.; Bahubalindruni, P.G.; Deb, S.; Goes, J.. "Robust linear sampling switch for low-voltage SAR ADCs". Analog Integrated Circuits and Signal Processing 103 2 (2020): 345-353. http://www.scopus.com/inward/record.url?eid=2-s2.0-85083187468&partnerID=MN8TOARS.
    10.1007/s10470-020-01641-w
  22. Wadhwa, N.; Bahubalindruni, P.G.; Chapagai, K.; Goes, J.; Deb, S.; Barquinha, P.. "Sixth-order differential Sallen-and-Key switched capacitor LPF using a-IGZO TFTs". International Journal of Circuit Theory and Applications 47 1 (2019): 32-42. http://www.scopus.com/inward/record.url?eid=2-s2.0-85055495337&partnerID=MN8TOARS.
    10.1002/cta.2576
  23. De Melo, J.L.A.; Pereira, N.; Leitao, P.V.; Paulino, N.; Goes, J.. "A systematic design methodology for optimization of sigma-delta modulators based on an evolutionary algorithm". IEEE Transactions on Circuits and Systems I: Regular Papers 66 9 (2019): 3544-3556. http://www.scopus.com/inward/record.url?eid=2-s2.0-85072034094&partnerID=MN8TOARS.
    10.1109/TCSI.2019.2925292
  24. Tiwari, B.; Bahubalindruni, P.G.; Santa, A.; Martins, J.; Mittal, P.; Goes, J.; Martins, R.; Fortunato, E.; Barquinha, P.. "Oxide TFT Rectifiers on Flexible Substrates Operating at NFC Frequency Range". IEEE Journal of the Electron Devices Society 7 (2019): 329-334. http://www.scopus.com/inward/record.url?eid=2-s2.0-85062949611&partnerID=MN8TOARS.
    10.1109/JEDS.2019.2897642
  25. Santin, E.; Oliveira, L.B.; Goes, J.. "Built-in self test of high speed analog-to-digital converters". IEEE Instrumentation and Measurement Magazine 22 6 (2019): 4-10. http://www.scopus.com/inward/record.url?eid=2-s2.0-85075971603&partnerID=MN8TOARS.
    10.1109/MIM.2019.8917897
  26. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.C.G.; Goes, J.. "Single-Stage Amplifier Biased by Voltage Combiners with Gain and Energy-Efficiency Enhancement". IEEE Transactions on Circuits and Systems II: Express Briefs 65 3 (2018): 266-270. http://www.scopus.com/inward/record.url?eid=2-s2.0-85042791739&partnerID=MN8TOARS.
    10.1109/TCSII.2017.2686586
  27. Povoa, R.; Lourenco, N.; Martins, R.; Canelas, A.; Horta, N.; Goes, J.. "Single-Stage OTA Biased by Voltage-Combiners with Enhanced Performance Using Current Starving". IEEE Transactions on Circuits and Systems II: Express Briefs 65 11 (2018): 1599-1603. http://www.scopus.com/inward/record.url?eid=2-s2.0-85036507263&partnerID=MN8TOARS.
    10.1109/TCSII.2017.2777533
  28. De Melo, J.L.A.; Paulino, N.; Goes, J.. "Continuous-time delta-sigma modulators based on passive RC integrators". IEEE Transactions on Circuits and Systems I: Regular Papers 65 11 (2018): 3662-3674. http://www.scopus.com/inward/record.url?eid=2-s2.0-85052554347&partnerID=MN8TOARS.
    10.1109/TCSI.2018.2855649
  29. Nowacki, B.; Paulino, N.; Goes, J.. "A Third-Order MASH S ¿ Modulator Using Passive Integrators". IEEE Transactions on Circuits and Systems I: Regular Papers 64 11 (2017): 2871-2883. http://www.scopus.com/inward/record.url?eid=2-s2.0-85020080422&partnerID=MN8TOARS.
    10.1109/TCSI.2017.2704164
  30. Oliveira, L.B.; Paulino, N.; Oliveira, J.P.; Santos-Tavares, R.; Pereira, N.; Goes, J.. "Undergraduate electronics projects based on the design of an optical wireless audio transmission system". IEEE Transactions on Education 60 2 (2017): 105-111. http://www.scopus.com/inward/record.url?eid=2-s2.0-84981745011&partnerID=MN8TOARS.
    10.1109/TE.2016.2590999
  31. Samanta, S.; Tiwari, B.; Bahubalindruni, P.G.; Barquinha, P.; Goes, J.. "Threshold voltage extraction techniques adaptable from sub-micron CMOS to large-area oxide TFT technologies". International Journal of Circuit Theory and Applications 45 12 (2017): 2201-2210. http://www.scopus.com/inward/record.url?eid=2-s2.0-85017370067&partnerID=MN8TOARS.
    10.1002/cta.2340
  32. Horta, N.; Baschirotto, A.; Fernández, F.V.; Dundar, G.; Goes, J.; Fernandes, J.. "Introduction to the special issue on PRIME 2016 and SMACD 2016". Integration, the VLSI Journal 58 (2017): 411-412. http://www.scopus.com/inward/record.url?eid=2-s2.0-85020901652&partnerID=MN8TOARS.
    10.1016/j.vlsi.2017.03.015
  33. I. Bastos; L.B. Oliveira; J. Goes; J.P. Oliveira; M. Silva. "Noise canceling LNA with gain enhancement by using double feedback". Integration 52 (2016): 309-315. https://doi.org/10.1016/j.vlsi.2015.07.003.
    10.1016/j.vlsi.2015.07.003
  34. SniataLa, P.; Naumowicz, M.; Handkiewicz, A.; Szcz¿sny, S.; De Melo, J.L.A.; Paulino, N.; Goes, J.. "Current mode sigma-delta modulator designed with the help of transistor's size optimization tool". Bulletin of the Polish Academy of Sciences: Technical Sciences 63 4 (2015): 919-922. http://www.scopus.com/inward/record.url?eid=2-s2.0-84962129203&partnerID=MN8TOARS.
    10.1515/bpasts-2015-0104
  35. Bastos, I.; Oliveira, L.B.; Goes, J.; Silva, M.. "A low power balun LNA with active loads for gain and noise figure optimization". Analog Integrated Circuits and Signal Processing 81 3 (2014): 693-702. http://www.scopus.com/inward/record.url?eid=2-s2.0-84914673490&partnerID=MN8TOARS.
    10.1007/s10470-014-0426-6
  36. Bastos, I.; Oliveira, L.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "Double feedforward 0.6 v LNA with high gain and low noise figure". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 235-238. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888872894&partnerID=MN8TOARS.
  37. Nowacki, B.; Paulino, N.; Goes, J.. "A simple 1 GHz non-overlapping two-phase clock generators for SC circuits". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 174-178. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888859678&partnerID=MN8TOARS.
  38. Custódio, J.R.; Goes, J.; Paulino, N.; Oliveira, J.P.; Bruun, E.. "A 1.2-V 165-µ W 0.29-mm2 multibit sigma-delta ADC for hearing aids using nonlinear DACs and with over 91 dB dynamic-range". IEEE Transactions on Biomedical Circuits and Systems 7 3 (2013): 376-385. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878319543&partnerID=MN8TOARS.
    10.1109/TBCAS.2012.2203819
  39. Figueiredo, M.; Santin, E.; Goes, J.; Evans, G.; Paulino, N.. "A reference-free 7-bit 500 MS/s pipeline ADC using current-mode reference shifting and quantizers with built-in thresholds". Analog Integrated Circuits and Signal Processing 75 1 (2013): 53-65. http://www.scopus.com/inward/record.url?eid=2-s2.0-84874941237&partnerID=MN8TOARS.
    10.1007/s10470-013-0030-1
  40. Custódio, J.R.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Pereira, P.; Goes, J.; Bruun, E.. "A 6.2 mW 0.024 mm2 fully-passive RF downconverter with 12 dB gain enhancement using MOS parametric amplification". Analog Integrated Circuits and Signal Processing 75 2 (2013): 299-304. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877876738&partnerID=MN8TOARS.
    10.1007/s10470-013-0049-3
  41. Serra, H.; Paulino, N.; Goes, J.. "A switched-capacitor biquad using a simple quasi-unity gain amplifier". Proceedings - IEEE International Symposium on Circuits and Systems (2013): 1841-1844. http://www.scopus.com/inward/record.url?eid=2-s2.0-84883388680&partnerID=MN8TOARS.
    10.1109/ISCAS.2013.6572223
  42. Santos-Tavares, R.; Santin, E.; Borrego, R.; Oliveira, J.; Goes, J.. "Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 247-250. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888874024&partnerID=MN8TOARS.
  43. Pereira, N.; Oliveira, L.B.; Goes, J.; Oliveira, J.. "Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 209-212. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888858803&partnerID=MN8TOARS.
  44. Borrego, R.; Oliveira, J.P.; Goes, J.. "A 2.3-dB NF CMOS low voltage LNA optimized for medical applications at 600MHz". Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 (2013): 575-579. http://www.scopus.com/inward/record.url?eid=2-s2.0-84888870516&partnerID=MN8TOARS.
  45. Figueiredo, M.; Goes, J.; Oliveira, L.B.; Steiger-Garção, A.. "Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds". International Journal of Circuit Theory and Applications 40 7 (2012): 681-691. http://www.scopus.com/inward/record.url?eid=2-s2.0-84863722452&partnerID=MN8TOARS.
    10.1002/cta.750
  46. Abdollahvand, S.; Gomes, A.; Rodrigues, D.; Januário, F.; Goes, J.. "Design of robust CMOS amplifiers combining advanced low-voltage and feedback techniques". IFIP Advances in Information and Communication Technology 372 AICT (2012): 421-428. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862881956&partnerID=MN8TOARS.
    10.1007/978-3-642-28255-3_46
  47. Camarinha-Matos, L.M.; Goes, J.; Gomes, L.; Martins, J.. "Raising awareness for value creation potential in engineering research". IFIP Advances in Information and Communication Technology 372 AICT (2012): 3-6. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862894066&partnerID=MN8TOARS.
    10.1007/978-3-642-28255-3_1
  48. Carvalho, J.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "A balun transimpedance amplifier with adjustable gain for integrated SPO 2 optic sensors". Proceedings of the 19th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2012 (2012): 178-182. http://www.scopus.com/inward/record.url?eid=2-s2.0-84864221123&partnerID=MN8TOARS.
  49. Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.; Silva, M.M.. "Balun LNA with continuously controllable gain and with noise and distortion cancellation". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2143-2146. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866603384&partnerID=MN8TOARS.
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  50. Abdollahvand, S.; Goes, J.; Oliveira, L.B.; Gomes, L.; Paulino, N.. "Low phase-noise temperature compensated self-biased ring oscillator". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2489-2492. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866599632&partnerID=MN8TOARS.
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  51. Pacheco, J.; Figueiredo, M.; Paulino, N.; Goes, J.. "Current-mode reference shifting solution for MDAC-based analog-to-digital converters". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 2989-2992. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866601865&partnerID=MN8TOARS.
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  52. De Melo, J.L.A.; Nowacki, B.; Paulino, N.; Goes, J.. "Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 301-304. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866596190&partnerID=MN8TOARS.
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  53. Santin, E.; Oliveira, L.B.; Goes, J.. "Fast and accurate estimation of gain and sample-time mismatches in time-interleaved ADCs using on-chip oscillators". ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (2012): 3154-3157. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866617792&partnerID=MN8TOARS.
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  54. Santin, E.; Figueiredo, M.; Goes, J.; Oliveira, L.B.. "CMOS fully differential feedforward-regulated folded cascode amplifier". IFIP Advances in Information and Communication Technology 349 AICT (2011): 565-572. http://www.scopus.com/inward/record.url?eid=2-s2.0-79952228719&partnerID=MN8TOARS.
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  56. Figueiredo, M.; Santos-Tavares, R.; Santin, E.; Ferreira, J.; Evans, G.; Goes, J.. "A two-stage fully differential inverter-based self-biased CMOS amplifier with high efficiency". IEEE Transactions on Circuits and Systems I: Regular Papers 58 7 (2011): 1591-1603. http://www.scopus.com/inward/record.url?eid=2-s2.0-79959785366&partnerID=MN8TOARS.
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  57. Figueiredo, M.; Santin, E.; Goes, J.; Paulino, N.; Barúqui, F.A.P.; Petraglia, A.. "Flipped-around multiply-by-two amplifier with unity feedback factor". Analog Integrated Circuits and Signal Processing 68 1 (2011): 133-138. http://www.scopus.com/inward/record.url?eid=2-s2.0-80052437306&partnerID=MN8TOARS.
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  58. Nowacki, B.; Paulino, N.; Goes, J.. "A second-order switched-capacitor ds modulator using very incomplete settling". Proceedings - IEEE International Symposium on Circuits and Systems (2011): 1367-1370. http://www.scopus.com/inward/record.url?eid=2-s2.0-79960859610&partnerID=MN8TOARS.
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  59. Silva, A.; Cavalheiro, D.; Abdollahvand, S.; Oliveira, L.B.; Figueiredo, M.; Goes, J.. "A self-biased ring oscillator with quadrature outputs operating at 600 MHz in a 130 nm CMOS technology". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 221-224. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053312818&partnerID=MN8TOARS.
  60. Abdollahvand, S.; Goes, J.; Paulino, N.; Nowacki, B.; Gomes, L.. "A polyphase comb filter using interlaying multiplexers for high-speed single-bit sigma-delta modulators". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 216-220. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053303696&partnerID=MN8TOARS.
  61. Pacheco, J.; Paulino, N.; Figueiredo, M.; Goes, J.. "Design of a 10-bit 40 MS/s pipelined ADC using 1.5-bit with current-mode reference shifting". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 299-302. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053305005&partnerID=MN8TOARS.
  62. Nowacki, B.; Paulino, N.; Goes, J.. "Analysis and the design of a first - Order ¿S modulator using very incomplete settling". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 274-278. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053313045&partnerID=MN8TOARS.
  63. Ortigueira, E.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.. "A simplified design of a MOSFET-only wideband Gilbert cell". Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 (2011): 225-230. http://www.scopus.com/inward/record.url?eid=2-s2.0-80053329069&partnerID=MN8TOARS.
  64. Ortigueira, E.; Bastos, I.; Oliveira, L.B.; Oliveira, J.P.; Goes, J.. "A simplified design methodology for MOSFET-only wideband mixer". International Journal of Electronics and Telecommunications 57 4 (2011): 503-509. http://www.scopus.com/inward/record.url?eid=2-s2.0-84855505666&partnerID=MN8TOARS.
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  66. Oliveira, J.; Goes, J.; Figueiredo, M.; Santin, E.; Fernandes, J.; Ferreira, J.. "An 8-bit 120-MS/s interleaved CMOS pipeline ADC based on MOS parametric amplification". IEEE Transactions on Circuits and Systems II: Express Briefs 57 2 (2010): 105-109. http://www.scopus.com/inward/record.url?eid=2-s2.0-77649339742&partnerID=MN8TOARS.
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  67. Custódio, J.R.; Figueiredo, M.; Santin, E.; Goes, J.. "A CMOS inverter-based self-biased fully differential amplifier". IFIP Advances in Information and Communication Technology 314 (2010): 541-548. http://www.scopus.com/inward/record.url?eid=2-s2.0-77649254549&partnerID=MN8TOARS.
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  69. Santin, E.; Oliveira, L.B.; Nowacki, B.; Goes, J.. "Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 1927-1930. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955996758&partnerID=MN8TOARS.
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  70. Figueiredo, M.; Santin, E.; Goes, J.; Santos-Tavares, R.; Evans, G.. "Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 2828-2831. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955995395&partnerID=MN8TOARS.
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  71. Custódio, J.R.; Oliveira, J.; Oliveira, L.B.; Goes, J.; Bruun, E.. "MOSFET-only mixer/IIR filter with gain using parametric amplification". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 1209-1212. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955997184&partnerID=MN8TOARS.
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  72. Bastos, I.; Oliveira, L.B.; Goes, J.; Silva, M.. "MOSFET-only wideband LNA with noise cancelling and gain optimization". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 306-311. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957253783&partnerID=MN8TOARS.
  73. Lopes, B.; Paulino, N.; Goes, J.; Steiger-Garção, A.. "Digitally programmable delay-locked-loop with variable charge pump current". Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (2010): 259-264. http://www.scopus.com/inward/record.url?eid=2-s2.0-77957281950&partnerID=MN8TOARS.
  74. Santin, E.; Figueiredo, M.; Tavares, R.; Goes, J.; Oliveira, L.B.. "Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices". 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings (2010): 25-28. http://www.scopus.com/inward/record.url?eid=2-s2.0-79953093908&partnerID=MN8TOARS.
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  75. Goes, J.; Paulino, N.; Figueiredo, M.; Santin, E.; Rodrigues, M.; Faria, P.; Vaz, B.; Monteiro, R.. "Purely-digital versus mixed-signal self-calibration techniques in high-resolution pipeline ADCs". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751529222&partnerID=MN8TOARS.
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  76. Custódio, J.R.; Oliveira, L.B.; Goes, J.; Oliveira, J.P.; Bruun, E.; Andreani, P.. "A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement". 28th Norchip Conference, NORCHIP 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-78751553142&partnerID=MN8TOARS.
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  77. Figueiredo, M.; Michalak, T.; Goes, J.; Gomes, L.; Sniatala, P.. "Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits". 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009 (2009): 763-766. http://www.scopus.com/inward/record.url?eid=2-s2.0-77951432156&partnerID=MN8TOARS.
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  78. Gama, R.; Galhardo, A.; Goes, J.; Paulino, N.; Neves, R.; Horta, N.. "Design of a low-power, open loop, multiply-by-two amplifier with gain-accuracy improved by local-feedback". Proceedings of the 16th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2009 (2009): 248-251. http://www.scopus.com/inward/record.url?eid=2-s2.0-72149110321&partnerID=MN8TOARS.
  79. Esperança, B.; Goes, J.; Tavares, R.; Galhardo, A.; Paulino, N.; Medeiros Silva, M.. "Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 220-223. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749094634&partnerID=MN8TOARS.
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  80. Galhardo, A.; Goes, J.; Paulino, N.. "Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2258-2261. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086355&partnerID=MN8TOARS.
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  81. Figueiredo, M.; Paulino, N.; Evans, G.; Goes, J.. "New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 232-235. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749086144&partnerID=MN8TOARS.
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  82. Santos-Tavares, R.; Paulino, N.; Higino, J.; Goes, J.; Oliveira, J.P.. "Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 724-727. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749112891&partnerID=MN8TOARS.
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  83. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "A multiplying-by-two CMOS amplfifier for high-speed ADCS based on parametric amplification". Proceedings of The 15th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2008 (2008): 177-180. http://www.scopus.com/inward/record.url?eid=2-s2.0-56349171251&partnerID=MN8TOARS.
  84. Custódio, J.R.; Paulino, N.; Goes, J.; Bruun, E.. "Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 1107-1110. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849140303&partnerID=MN8TOARS.
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  85. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.; Paisana, J.. "New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification". Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (2008): 251-254. http://www.scopus.com/inward/record.url?eid=2-s2.0-57849087451&partnerID=MN8TOARS.
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  86. Paulino, N.; Goes, J.; Steiger-Garção, A.. "A CMOS variable width short-pulse generator circuit for UWB radar applications". Proceedings - IEEE International Symposium on Circuits and Systems (2008): 2713-2716. http://www.scopus.com/inward/record.url?eid=2-s2.0-51749118458&partnerID=MN8TOARS.
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  87. Goes, J.; Pereira, J.C.; Paulino, N.; Silva, M.M.. "Switched-capacitor multiply-by-two amplifier insensitive to component mismatches". IEEE Transactions on Circuits and Systems II: Express Briefs 54 1 (2007): 29-33. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847671350&partnerID=MN8TOARS.
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  89. Galhardo, A.; Goes, J.; Paulino, N.. "Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2007): 218-221. http://www.scopus.com/inward/record.url?eid=2-s2.0-50649095466&partnerID=MN8TOARS.
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  90. Oliveira, J.P.; Goes, J.; Paulino, N.; Fernandes, J.. "Improved low-power low-voltage CMOS comparator for 4-bit flash ADCS for UWB applications". Proceedings of the 14th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2007 (2007): 293-296. http://www.scopus.com/inward/record.url?eid=2-s2.0-47749152264&partnerID=MN8TOARS.
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  91. Goes, J.; Vaz, B.; Monteiro, R.; Paulino, N.. "A 0.9V ¿S modulator with 80dB SNDR and 83dB DR using a single-phase technique". Digest of Technical Papers - IEEE International Solid-State Circuits Conference (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33847745487&partnerID=MN8TOARS.
  92. Galhardo, A.; Goes, J.; Paulino, N.. "Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability". Proceedings - IEEE International Symposium on Circuits and Systems (2006): 2001-2004. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847618539&partnerID=MN8TOARS.
  93. Santos-Tavares, R.; Paulino, N.; Goes, J.; Oliveira, J.P.. "Optimum sizing and compensation of two-stage CMOS amplifiers based on a time-domain approach". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (2006): 533-536. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349126139&partnerID=MN8TOARS.
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  94. Evans, G.; Goes, J.; Paulino, N.. "On-chip built-in self-test of video-rate ADCs using a 1.5 v CMOS Gaussian noise generator". 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (2006): 669-672. http://www.scopus.com/inward/record.url?eid=2-s2.0-43549094267&partnerID=MN8TOARS.
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  95. Vaz, B.; Goes, J.; Piloto, R.; Neto, J.; Monteiro, R.; Paulino, N.. "A Low-Voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 4074-4077. http://www.scopus.com/inward/record.url?eid=2-s2.0-33845733892&partnerID=MN8TOARS.
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  96. Goes, J.; Vaz, B.; Paulino, N.; Pinto, H.; Monteiro, R.; Garção, A.S.. "Switched-capacitor circuits using a single-phase scheme". Proceedings - IEEE International Symposium on Circuits and Systems (2005): 3123-3126. http://www.scopus.com/inward/record.url?eid=2-s2.0-39749155470&partnerID=MN8TOARS.
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  98. Goes, J.; Paulino, N.; Pinto, H.; Monteiro, R.; Vaz, B.; Garção, A.S.. "Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme". IEEE Transactions on Circuits and Systems I: Regular Papers 52 12 (2005): 2595-2604. http://www.scopus.com/inward/record.url?eid=2-s2.0-29344466938&partnerID=MN8TOARS.
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  99. Vaz, B.; Goes, J.; Paulino, N.. "A 1.5-V 10-b 50 MS/s time-interleaved switched-opamp pipeline CMOS ADC with high energy efficiency". IEEE Symposium on VLSI Circuits, Digest of Technical Papers CIRCUITS S (2004): 432-435. http://www.scopus.com/inward/record.url?eid=2-s2.0-4544256283&partnerID=MN8TOARS.
  100. Goes, J.; Pinto, H.; Monteiro, R.; Paulino, N.; Vaz, B.; AS-Garção. "Low power low-voltage CMOS A/D switched-opamp ~A modulator for bio-potential signals using a single-phase scheme". 2004 IEEE International Workshop on Biomedical Circuits and Systems (2004): http://www.scopus.com/inward/record.url?eid=2-s2.0-28244496132&partnerID=MN8TOARS.
  101. Unterweissacher, M.; Goes, J.; Paulino, N.; Evans, G.; Ortigueira, M.D.. "Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038489138&partnerID=MN8TOARS.
  102. Tavares, R.; Vaz, B.; Goes, J.; Paulina, N.; Steiger-Garção, A.. "Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038496823&partnerID=MN8TOARS.
  103. Paulina, N.; Serrazina, M.; Goes, J.; Steiger-Garção, A.. "Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158224&partnerID=MN8TOARS.
  104. Evans, G.; Goes, J.; Steiger-Garção, A.; Ortigueira, M.D.; Paulino, N.; Sousa Lopes, J.. "Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2003): http://www.scopus.com/inward/record.url?eid=2-s2.0-0038158222&partnerID=MN8TOARS.
  105. Vaz, B.; Paulino, N.; Goes, J.; Costa, R.; Tavares, R.; Steiger-Garção, A.. "Design of low-voltage CMOS pipelined ADC's using 1 pico-Joule of energy per conversion". Proceedings - IEEE International Symposium on Circuits and Systems 1 (2002): http://www.scopus.com/inward/record.url?eid=2-s2.0-0036292221&partnerID=MN8TOARS.
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  112. Goes, J.; Vital, J.C.; Franca, J.E.. "Systematic design for optimization of high-speed self-calibrated pipelined A/D converters". IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45 12 (1998): 1513-1526. http://www.scopus.com/inward/record.url?eid=2-s2.0-0032259908&partnerID=MN8TOARS.
    10.1109/82.746663
  113. Goes, J.; Vital, J.C.; Franca, J.E.. "CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters". Proceedings of the Custom Integrated Circuits Conference (1996): 105-108. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029701107&partnerID=MN8TOARS.
  114. Goes, Joao; Vital, Joao C.; Franca, Jose E.. "Optimum resolution-per-stage in high-speed pipelined A/D converters using self-calibration". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1995): 525-528. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029191729&partnerID=MN8TOARS.
  115. Goes, J.; Vital, J.C.; Franca, J.E.. "Analogue self-calibration technique for high-resolution video-rate pipelined A/D converters". Midwest Symposium on Circuits and Systems 2 (1995): 740-743. http://www.scopus.com/inward/record.url?eid=2-s2.0-0029457797&partnerID=MN8TOARS.
  116. Vital, J.C.; Horta, N.C.; Silva, N.S.; Franca, N.E.; Goes, J.; Lanca, M.A.; Franca, J.E.. "Automatic synthesis of modular data conversion architectures and functional building blocks". IEE Conference Publication 393 (1994): 102-109. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028018726&partnerID=MN8TOARS.
  117. Goes, J.; Franca, J.; Paulino, N.; Grilo, J.; Temes, G.. "High-linearity calibration of low-resolution digital-to-analog converters". Proceedings - IEEE International Symposium on Circuits and Systems 5 (1994): 345-348. http://www.scopus.com/inward/record.url?eid=2-s2.0-0028572582&partnerID=MN8TOARS.

Intellectual property

Patent
  1. Paulino, N.; Ortigueira, MD; Unterweissacher, M; Evans, G.; Goes, João. 2006. "Digital-Domain Self-Calibration and Built-in Self-Testing Techniques for High-Speed Integrated A/D Converters Using White Gaussian Noise".

Other

Other output
  1. The Probability Density of the Spectral Correlation Function Estimates. 2024. Tavares, M.; Gerald, J.; Goes, J.. http://www.scopus.com/inward/record.url?eid=2-s2.0-85198858704&partnerID=MN8TOARS.
    10.21203/rs.3.rs-4541780/v1
  2. Prototype of an affordable pressure-controlled emergency mechanical ventilator for COVID-19. 2020. Pereira, A.; Lopes, L.; Fonte, P.; Póvoa, P.; Santos, T.G.; Martinho, A.; Neves, Â.; et al. http://www.scopus.com/inward/record.url?eid=2-s2.0-85181590807&partnerID=MN8TOARS.
    10.48550/arxiv.2004.00310
  3. IEEE-CAS4IIoT: 2nd seasonal school in circuits and systems for the industrial internet of things. 2019. Goes, J.; Oliveira, J.P.; Oliveira, L.. http://www.scopus.com/inward/record.url?eid=2-s2.0-85090881415&partnerID=MN8TOARS.
    10.1109/MSSC.2019.2920559
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2018/01/02 - 2024/12/18 Automated Flat Circuit-Level Topology Generation
Supervisor
 Doctoral Program in Electrical and Computer Engineering (PDEEC) (PhD)
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
2018/06/30 - 2024/12/13 Neuro-Inspired Ultra-Low-Ppwer CMOS Electronic System for ECG and BMI Applications
Supervisor
 Doctoral Program in Electrical and Computer Engineering (PDEEC) (PhD)
Universidade Nova de Lisboa Centro de Tecnologias e Sistemas, Portugal
2018/01/01 - 2022/03/01 An Energy-Efficient Hybrid DAC based SAR ADC using Deep-submicron CMOS and Large-Area Oxide TFT Technologies
Co-supervisor of Bhawna Tiwari
 Electronics (PhD)
Indraprastha Institute of Information Technology Delhi, India
2016/03/01 - 2021/01/24 TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors
Co-supervisor
 Electronics (PhD)
Universidade Nova de Lisboa, Portugal
2014/01/01 - 2021/01/19 Design of High-performance Low-noise and Low-power Digital CMOS Circuitry for Mixed-Signal Systems Integrating Asynchronous Architectures and Employing Self-Biased Logic
Supervisor
 Doctoral Program in Electrical and Computer Engineering (PhD)
Universidade Nova de Lisboa, Portugal
2015/01/01 - 2019/12/19 Analog-to-Digital Converters with embedded IF mixing using variable reference voltages
Supervisor
 Electronics (PhD)
Universidade Nova de Lisboa, Portugal
2014 - 2018 A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Gain Improvement
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011 - 2017/12/18 Sigma-Delta Modulators with Passive RC Integrators: Theory, Design Methodology for Optimization and Silicon Results
Co-supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2011 - 2016/05/11 Design of sigma-delta modulators for analog-to-digital conversion intensively using passive circuits
Co-supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/17 Design of analog-to-digital converters with embedded mixing for ultra-low-power radio receivers
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2009 - 2014/12/16 A Built-in self-test technique for high speed analog-to-digital converters
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2008 - 2011/12/21 Ultra-Low Power-and-Area CMOS RF and Baseband Circuits for Biomedical
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2005 - 2010/12/22 Conversão Analógo-digital de Elevada Velocidade para Receptores Digitais Ultra-wideband
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2006 - 2010/12/20 Metodologias e Ferramentas para o Desenho de Circuitos Electrónicos Analógicos Assistidos por Computador
Co-supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2003 - 2008/11 Novel Techniques for the Design and Practical Realization of Switched-capacitor Circuits in Deep-submicron Cmos Technologies
Supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2004 - 2008 Reference-Free High-Speed CMOS Pipeline Analog-to-Digital Converters
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
2001 - 2006 Geradores de Ruído Branco Gaussiano e Uniforme para a Realização de Teste e Calibração Automática de Adc´s em Circuitos Integrados Cmos
Supervisor
 Física (PhD)
Universidade de Lisboa, Portugal
2001 - 2005 Conversores Analógico/digital de Elevada Velocidade e Tensão de Alimentação Reduzida
Supervisor
 Engenharia Electrotécnica (PhD)
Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia, Portugal
Distinctions

Award

2025 Best Associate Editor of IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Circuits and Systems Society, United States
2017 Best Teacher Award in Electrical and Computer Engineering 2016/2017
Faculdade de Ciencias e Tecnologia da Universidade NOVA de Lisboa, Portugal
2016 Prémio Inovação INCM 2016, “Papel Secreto – uma abordagem inovadora e de baixo custo”
Imprensa Nacional Casa da Moeda (INCM), Portugal
2012 2012 IEEE CASS Outstanding Young Author Award
IEEE Circuits and Systems Society, United States