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Dr. Sergio Bampi received the Electronics Engineer and B.Sc. Physics degrees from the Federal University of Rio Grande do Sul (UFRGS, 1979). He received the MSEE and Ph.D. in Electrical Engineering degrees from Stanford University in 1982 and 1986, respectively. He is a full professor at the Informatics Institute at UFRGS, Brazil, which he joined in 1981. He was a former president of the Brazilian Microelectronics Society, of the FAPERGS Brazilian research funding agency, and CEITEC Technical Director. He was a distinguished lecturer of IEEE CAS Society (2009-2010). He has published more than 500 research papers in conferences and journals, in the fields of CMOS Analog, Digital, RF Design, and Approximate Computing across the design abstraction layers for DSP, Machine Learning, and Video Coding applications. He served as Technical Program Chair of SBCCI (1997, 2005), IEEE LASCAS (2013), VARI (2015), SBMICRO Congress (1989, 1995), and served on TPC Committees of DAC, ICCAD, SBCCI, ICM, LASCAS, VLSI-SoC, ICECS, and many other international conferences. He is a Senior Member of the IEEE Society
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Identificação

Identificação pessoal

Nome completo
Sergio Bampi

Nomes de citação

  • Bampi, Sergio

Identificadores de autor

Ciência ID
AA1A-AEB7-F6C1
ORCID iD
0000-0002-9018-6309

Endereços de correio eletrónico

  • bampi@inf.ufrgs.br (Profissional)

Domínios de atuação

  • Ciências da Engenharia e Tecnologias - Engenharia Eletrotécnica, Eletrónica e Informática

Idiomas

Idioma Conversação Leitura Escrita Compreensão Peer-review
Português (Idioma materno)
Inglês Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2)
Espanhol; Castelhano Utilizador independente (B2) Utilizador proficiente (C1) Utilizador independente (B1) Utilizador proficiente (C1) Utilizador proficiente (C1)
Francês Utilizador elementar (A2) Utilizador independente (B1) Utilizador elementar (A2) Utilizador independente (B2) Utilizador independente (B1)
Italiano Utilizador elementar (A2) Utilizador independente (B1) Utilizador elementar (A2) Utilizador independente (B1) Utilizador independente (B1)
Formação
Grau Classificação
1983/03/01 - 1986/07/01
Concluído
 Microelectronics Electrical Engineering (Doctor of Philosophy)
Stanford University, Estados Unidos
1980 - 1982
Concluído
 Microelectronics Electrical Engineering (Master)
Stanford University, Estados Unidos
1976 - 1979
Concluído
 Physics (Bachelor)
Universidade Federal do Rio Grande do Sul, Brasil
1975 - 1979
Concluído
 Electronic Engineering (Bachelor)
Universidade Federal do Rio Grande do Sul, Brasil
Percurso profissional

Ciência

Categoria Profissional
Instituição de acolhimento 		Empregador
1998 - 1999 Pós-doutorado (Investigação) Stanford University, Estados Unidos

Docência no Ensino Superior

Categoria Profissional
Instituição de acolhimento 		Empregador
1981/01/01 - Atual Professor Catedrático (Docente Universitário) Universidade Federal do Rio Grande do Sul, Brasil
Projetos

Projeto

Designação Financiadores
2021 - Atual ARQAPROX: ARQUITETURAS APROXIMADAS E DE BAIXA POTÊNCIA PARA PROCESSAMENTO DE SINAIS, IMAGENS E VÍDEOS
1
Investigador
Em curso
2020 - Atual ML-DSIV - Towards Approximate Edge Computing for Machine Learning & Digital Signal, Image and Video Processings
1
Investigador responsável
Em curso
2020 - Atual ULP-LV CMOS Design de Receptor Ultra-Low Power e Circuitos Digitais em Baixa Tensão Near-VT
1
Investigador responsável
Em curso
2019 - Atual ReACT: Reliability and Approximate Computing Techniques for Neural Networks and Image/Video Coding
1
Investigador responsável
Em curso
Produções

Publicações

Artigo em conferência
  1. Bitencourt, T.P.; Ramos, F.L.L.; Bampi, S.. "High-Throughput and Low-Power Architectures for the AV1 Arithmetic Encoder". 2021.
    10.1109/SBCCI53441.2021.9529994
  2. Da Rosa, M.; Da Costa, P.; Da Costa, E.; Almeida, S.; Paim, G.; Bampi, S.. "A Robust and Power-Efficient Power Line Interference Canceling VLSI Design". 2021.
    10.1109/SBCCI53441.2021.9529983
  3. Lima, V.H.S.; Stigger, M.F.; Soares, L.B.; Diniz, C.M.; Bampi, S.. "Configurable Approximate Hardware Accelerator to Compute SATD and SAD Metrics for Low Power All-Intra High Efficiency Video Coding". 2021.
    10.1109/SBCCI53441.2021.9529974
  4. Rocha, L.G.; Paim, G.; Biswas, D.; Bampi, S.; Catthoor, F.; Van Hoof, C.; Van Helleputte, N.. "LSTM-only Model for Low-complexity HR Estimation from Wrist PPG". 2021.
    10.1109/EMBC46164.2021.9630942
  5. Da Costa, P.; Pereira, P.T.L.; Paim, G.; Da Costa, E.; Bampi, S.. "Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations". 2021.
    10.1109/ICECS53924.2021.9665538
  6. de Abreu, B.A.; Berndt, A.; Campos, I.S.; Meinhardt, C.; Carvalho, J.T.; Grellert, M.; Bampi, S.. "Fast logic optimization using decision trees". 2021.
    10.1109/ISCAS51556.2021.9401664
  7. Rai, S.; Neto, W.L.; Miyasaka, Y.; Zhang, X.; Yu, M.; Yi, Q.; Fujita, M.; et al. "Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization". 2021.
    10.23919/DATE51398.2021.9473972
  8. Ferreira, G.; Pereira, P.T.L.; Paim, G.; Costa, E.; Bampi, S.. "A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders". 2021.
    10.1109/LASCAS51355.2021.9667154
  9. Pereira, P.T.L.; Paim, G.; Ferreira, G.; Costa, E.; Almeida, S.; Bampi, S.. "Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures". 2021.
    10.1109/LASCAS51355.2021.9459128
  10. Toledo, P.; Klimach, H.; Bampi, S.; Crovetti, P.. "A 300mV-supply, 144nW-Power, 0.03mm2-Area, 0.2-PEF digital-based biomedical signal amplifier in 180nm CMOS". 2021.
    10.1109/MeMeA52024.2021.9478709
  11. Da Rosa, M.M.A.; Paim, G.; Rocha, L.M.G.; Da Costa, E.A.C.; Bampi, S.. "The Radix-2mSquared Multiplier". 2020.
    10.1109/ICECS49266.2020.9294854
  12. Beling, B.; Storch, I.; Agostini, L.; Zatt, B.; Bampi, S.; Palomino, D.. "ERP-Based CTU Splitting Early Termination for Intra Prediction of 360 videos". 2020.
    10.1109/VCIP49819.2020.9301879
  13. Rocha, L.M.G.; Macedo, M.; Paim, G.; Costa, E.; Bampi, S.. "Improving the partial product tree compression on signed radix-2mparallel multipliers". 2020.
    10.1109/NEWCAS49341.2020.9159776
  14. de Souza, G.; Bampi, S.; Cerveira, A.; Zatt, B.; Sampaio, F.. "Evaluation of Cache-Based Memory Hierarchy for HEVC Video Decoding". 2020.
    10.1109/SBCCI50935.2020.9189909
  15. de Lima, V.F.; Ataide, R.; Bampi, S.; Klimach, H.. "Performance and Variability Trade-offs of CMOS PTAT Generator Topologies for Voltage Reference Applications". 2020.
    10.1109/SBCCI50935.2020.9189931
  16. Wuerdig, R.N.; Lima, V.G.; Baumgratz, F.; Soares, R.; Bampi, S.. "Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS". 2020.
    10.1109/LASCAS45839.2020.9069031
  17. Medeiros, W.T.; Klimach, H.; Bampi, S.. "A 40 nW 32.7 kHz CMOS Relaxation Oscillator with Comparator Offset Cancellation for Ultra-Low Power applications". 2020.
    10.1109/LASCAS45839.2020.9069038
  18. Canal, B.; Klimach, H.D.; Bampi, S.; Balen, T.R.. "Low-Voltage Dynamic Comparator with Bulk-Driven Floating Inverter Amplifier". 2020.
    10.1109/SBCCI50935.2020.9189918
  19. Da Rosa, M.M.A.; Paim, G.; Rocha, L.M.G.; Da Costa, E.A.C.; Bampi, S.. "Exploring efficient adder compressors for power-efficient sum of squared differences design". 2020.
    10.1109/ICECS49266.2020.9294915
  20. Stigger, M.F.; Lima, V.H.S.; Soares, L.B.; Diniz, C.M.; Bampi, S.. "Approximate SATD Hardware Accelerator Using the 8 × 8 Hadamard Transform". 2020.
    10.1109/LASCAS45839.2020.9068987
  21. Ferreira, L.; Moreira, M.; Souza, B.; Ferreira, S.; Baumgratz, F.; Bampi, S.. "Review on the Evolution of Low-power and Highly-linear Time-to-Digital Converters - TDC". 2020.
    10.1109/LASCAS45839.2020.9068950
  22. Seidel, H.; Rosa, M.D.; Paim, G.; Costa, E.D.; Almeida, S.; Bampi, S.. "Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes". 2020.
    10.1109/LASCAS45839.2020.9068951
  23. Fontanari, T.V.; Paim, G.; Rocha, L.M.G.; Ucker, P.; Costa, E.; Bampi, S.. "An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay". 2020.
    10.1109/LASCAS45839.2020.9069009
  24. La Rosa, A.; Ucker, P.; Paim, G.; Da Costa, E.; Almeida, S.; Bampi, S.. "Exploring NLMS and IPNLMS adaptive filtering vlsi hardware architectures for robust EEG signal artifacts elimination". 2020.
    10.1109/ICECS49266.2020.9294785
  25. Da Costa, P.U.L.; Paim, G.; Rocha, L.; Da Costa, E.; Almeida, S.; Bampi, S.. "An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing". 2020.
    10.1109/ICECS49266.2020.9294943
  26. Ucker, P.; Weirich, M.R.; Paim, G.; Da Costa, E.A.C.; Bampi, S.. "Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design". 2020.
    10.1109/LASCAS45839.2020.9068958
  27. Leme, M.T.; Paim, G.; Rocha, L.M.G.; Ucker, P.; Lima, V.G.; Soares, R.; Da Costa, E.A.C.; Bampi, S.. "Optimizing the Montgomery Modular Multiplier for a Power- And Area-Efficient Hardware Architecture". 2020.
    10.1109/MWSCAS48704.2020.9184487
  28. Medeiros, W.T.; Klimach, H.; Bampi, S.. "Ultra-Low Power Relaxation Oscillators survey: Design Trends and Challenges". 2020.
    10.1109/PRIME-LA47693.2020.9062720
  29. Ferreira, G.; Rocha, L.M.G.; Costa, E.; Bampi, S.. "Combining m=2 Multipliers and Adder Compressors for Power Efficient Radix-4 Butterfly". 2020.
    10.1109/MWSCAS48704.2020.9184464
  30. Abreu, B.A.; Grellert, M.; Bampi, S.. "VLSI Design of tree-based inference for low-power learning applications". 2020.
  31. Sartori, M.L.L.; Wuerdig, R.N.; Moreira, M.T.; Bampi, S.; Calazans, N.L.V.. "Leveraging QDI robustness to simplify the design of IoT circuits". 2020.
  32. Pereira, P.T.L.; Paim, G.; Ucker, P.; Costa, E.; Almeida, S.; Bampi, S.. "Exploring architectural solutions for an energy-efficient kalman filter gain realization". 2019.
    10.1109/ICECS46596.2019.8964734
  33. Saggiorato, A.V.P.; Ramos, F.L.L.; Zatt, B.; Porto, M.; Bampi, S.. "HEVC Residual Syntax Elements Generation Architecture for High-Throughput CABAC Design". 2019.
    10.1109/ICECS.2018.8617844
  34. Ferreira, R.S.; Paim, G.; Abreu, B.A.; DIniz, C.M.; Costa, E.; Bampi, S.. "HEVC Interpolation Filter Architecture Using Hybrid Encoding Arithmetic Operators". 2019.
    10.1109/MWSCAS.2019.8885370
  35. Brito, J.P.M.; Bampi, S.. "Two-transistor voltage-measurement-based test structure for fast extraction of MOS mismatch design parameters". 2019.
    10.1109/ICMTS.2019.8730918
  36. Rocha, L.G.; Helleputte, N.V.; Liu, M.; Biswas, D.; Verhoef, B.-E.; Bampi, S.; Kim, C.H.; et al. "Real-Time HR Estimation from wrist PPG using Binary LSTMs". 2019.
    10.1109/BIOCAS.2019.8918726
  37. Soares, L.B.; Da Costa, E.A.C.; Bampi, S.. "A configurable pruning gaussian image filter for energy-efficient edge detection". 2019.
    10.1109/ICECS46596.2019.8964705
  38. Paim, G.; Rocha, L.M.G.; Da Costa, E.A.C.; Bampi, S.. "Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder Compressors". 2019.
    10.1109/NEWCAS44328.2019.8961253
  39. Lima, V.G.; Paim, G.; Rocha, L.M.G.; Da Rosa, L.; Marques, F.; Da Costa, E.A.C.; Camargo, V.; Soares, R.; Bampi, S.. "Maximizing side channel attack-resistance and energy-efficiency of the STTL combining multi-VT transistors with current and capacitance balancing". 2019.
    10.1109/ISCAS.2019.8702687
  40. Silveira, D.S.; Mativi, A.; Porto, M.S.; Bampi, S.. "Energy Savings with Non-Volatile Memory System for High Definition Video Encoders". 2019.
    10.1109/NEWCAS44328.2019.8961238
  41. Stigger, M.F.; Lima, V.H.S.; Soares, L.B.; Diniz, C.M.; Bampi, S.. "Approximate sum of absolute transformed differences hardware accelerator". 2019.
    10.1109/ICECS46596.2019.8964778
  42. Toledo, P.; Crovetti, P.; Klimach, H.; Bampi, S.. "A 300mV-Supply, 2nW-Power, 80pF-Load CMOS digital-based OTA for IoT interfaces". 2019.
    10.1109/ICECS46596.2019.8965062
  43. Rodovalho, L.H.; Toledo, P.; Bampi, S.. "A 0.6 v current reference based on the MOSFET forward-body-biased ZTC condition". 2019.
    10.1109/ICECS46596.2019.8964641
  44. Abreu, B.; Grellert, M.; Paim, G.; Fontanari, T.; Rocha, L.M.G.; Da Costa, E.A.C.; Bampi, S.. "Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion Estimation". 2019.
    10.1109/NEWCAS44328.2019.8961299
  45. Costa, A.L.T.; Klimach, H.; Bampi, S.. "A sub-1mA highly linear inductorless wideband LNA with low IP3 sensitivity to variability for IoT applications". 2019.
    10.1145/3338852.3339858
  46. Moreira, M.; Ferreira, L.; Souza, B.; Ferreira, S.B.; Baumgratz, F.D.; Bampi, S.. "Low power 380 µw energy efficient 1.8 GHz digitally controlled oscillator for IoT applications". 2019.
    10.1109/ICECS46596.2019.8964984
  47. Sequeira, L.F.; Santana, G.M.; Paim, G.; Rocha, L.M.G.; Abreu, B.; Costa, E.; Bampi, S.. "Low-Power HEVC 8-point 2-D Discrete Cosine Transform Hardware Using Adder Compressors". 2018.
    10.1109/NEWCAS.2018.8585470
  48. Abreu, B.; Paim, G.; Grellert, M.; Silveira, B.; Diniz, C.; Costa, E.; Bampi, S.. "Exploiting absolute arithmetic for power-efficient sum of absolute differences". 2018.
    10.1109/ICECS.2017.8292062
  49. Paim, G.; Marques, P.; Costa, E.; Almeida, S.; Bampi, S.. "Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider". 2018.
    10.1109/ICECS.2017.8292070
  50. Abreu, B.; Santana, G.; Grellert, M.; Paim, G.; Rocha, L.; Da Costa, E.A.C.; Bampi, S.. "Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation". 2018.
    10.1109/SBCCI.2018.8533241
  51. Rocha, L.M.G.; Paim, G.; Ferreira, R.; Costa, E.; Bampi, S.. "Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers". 2018.
    10.1109/ICECS.2017.8292065
  52. Ramos, F.L.L.; Zatt, B.; Porto, M.; Bampi, S.. "High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC". 2018.
    10.1109/ISCAS.2018.8350885
  53. Soares, L.B.; Da Rosa, M.M.A.; Diniz, C.M.; Da Costa, E.A.C.; Bampi, S.. "Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering". 2018.
    10.1109/LASCAS.2018.8399938
  54. Grellert, M.; Bampi, S.; Correa, G.; Zatt, B.; Da Silva Cruz, L.A.. "Learning-Based Complexity Reduction and Scaling for HEVC Encoders". 2018.
    10.1109/ICASSP.2018.8461351
  55. Weirich, M.R.; Paim, G.; Da Costa, E.A.C.; Bampi, S.. "A Fixed-point natural logarithm approximation hardware design using taylor series". 2018.
    10.1109/NGCAS.2018.8572071
  56. Baumgratz, F.D.; Ferreira, S.B.; Steyaert, M.; Bampi, S.; Tavernier, F.. "A Charge-Sharing Bandpass Filter Topology with Boosted Q-Factor in 40-NM CMOS". 2018.
    10.1109/SBCCI.2018.8533233
  57. Sapper, A.N.; Soares, L.; Costa, E.; Bampi, S.. "Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation". 2018.
    10.1109/ICECS.2017.8292079
  58. Silveira, B.; Abreu, B.; Paim, G.; Greller, M.; Ferreira, R.; Diniz, C.; Costa, E.; Bampi, S.. "Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding". 2018.
    10.1109/ICECS.2017.8292076
  59. Rocha, L.M.G.; Paim, G.; Santana, G.M.; Abreu, B.A.; Ferreira, R.; Da Costa, E.A.C.; Bampi, S.. "Physical implementation of an ASIC-oriented SRAM-based viterbi decoder". 2018.
    10.1109/ICECS.2017.8292077
  60. Bortolon, F.T.; Abich, G.; Bampi, S.; Reis, R.; Moraes, F.; Ost, L.. "Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems". 2018.
    10.1109/ISCAS.2018.8351391
  61. Santana, G.M.; Paim, G.; Rocha, L.M.G.; Neuenfeld, R.; Beck Fonseca, M.; Da Costa, E.A.C.; Bampi, S.. "Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors". 2018.
    10.1109/ICECS.2017.8292075
  62. Silveira, D.S.; Bampi, S.; Moro, G.B.; Da Cruz, E.H.M.; Navaux, P.O.A.; Schnorr, L.M.. "System energy analysis for shared memory multiprocessing applications". 2017.
    10.1109/ICECS.2016.7841318
  63. Cordova, D.; De Oliveira, A.C.; Toledo, P.; Klimach, H.; Bampi, S.; Fabris, E.. "A sub-1 V, nanopower, ZTC based zero-VT temperature-compensated current reference". 2017.
    10.1109/ISCAS.2017.8050289
  64. Livi Ramos, F.L.; Zatt, B.; Porto, M.S.; Bampi, S.. "Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture". 2017.
    10.1145/3109984.3110017
  65. Andrade, N.; Toledo, P.; Guimaraes, G.; Dornelas, H.; Klimach, H.; Bampi, S.. "Low power IEEE 802.11ah receiver system-level design aiming for IoT applications". 2017.
    10.1145/3109984.3110013
  66. Dornelles, R.; Paim, G.; Silveira, B.; Fonseca, M.; Costa, E.; Bampi, S.. "A power-efficient 4-2 Adder Compressor topology". 2017.
    10.1109/NEWCAS.2017.8010160
  67. Zamparette, R.L.B.; Klimach, H.D.; Bampi, S.. "A 90% efficiency 60 mW MPPT switched capacitor DC - DC converter for photovoltaic energy harvesting aiming for IoT applications". 2017.
    10.1109/LASCAS.2017.7948099
  68. De Oliveira, A.C.; Cordova, D.; Klimach, H.D.; Bampi, S.. "A 0.45 V, 93 pW temperature-compensated CMOS voltage reference". 2017.
    10.1109/LASCAS.2017.7948051
  69. De Avila, L.A.; Kunst, R.; Pignaton, E.; Rochol, J.; Bampi, S.. "Energy efficiency evaluation of the pulse shapes and modulation techniques for IR-UWB in WBANs". 2017.
    10.1109/ICECS.2016.7841160
  70. De Oliveira, A.C.; Cordova, D.; Klimach, H.; Bampi, S.. "An ultra-low power high-order temperature- compensated CMOS voltage reference". 2017.
    10.1109/NEWCAS.2017.8010093
  71. Amaral, L.; Povala, G.; Porto, M.; Silveira, D.; Bampi, S.. "Memory energy consumption analyzer for video encoder hardware architectures". 2017.
    10.1109/ICECS.2016.7841203
  72. Paim, G.; Soares, L.B.; Ferreira, R.; Costa, E.; Bampi, S.. "Pruning and approximation of coefficients for power-efficient 2-D Discrete Tchebichef Transform". 2017.
    10.1109/NEWCAS.2017.8010096
  73. Grellert, M.; Bampi, S.; Zatt, B.. "Complexity-scalable HEVC encoding". 2017.
    10.1109/PCS.2016.7906356
  74. De Matos Alonso, C.; Livi Ramos, F.L.; Zatt, B.; Porto, M.; Bampi, S.. "Low-power HEVC Binarizer architecture for the CABAC block targeting UHD video processing". 2017.
    10.1145/3109984.3109988
  75. Martinez, L.V.; Livi Ramos, F.L.; Zatt, B.; Porto, M.; Bampi, S.. "Low-power multi-size HEVC DCT architecture proposal for QFHD video processing". 2017.
    10.1145/3109984.3109987
  76. Costa, A.L.T.; Klimach, H.; Bampi, S.. "A high IIP3 6.5 mW self-biased 0.3-3 GHz small area LNA". 2017.
    10.1109/LASCAS.2017.7948086
  77. Guimaraes, G.T.N.; Klimach, H.D.; Bampi, S.. "A fully integrated CMOS 2.4GHz and 24dBm linear power amplifier". 2017.
    10.1109/NEWCAS.2017.8010151
  78. Bortolon, F.T.; Moraes, F.G.; Moreira, M.T.; Bampi, S.. "Estimation methods for static noise margins in CMOS subthreshold logic circuits". 2017.
    10.1145/3109984.3109998
  79. Herve, M.; Thiele, C.; Machado, D.; Wojichowski, G.; Crovato, C.; Bampi, S.; Susin, A.. "Data compression and decompression Integrated Circuit for AC Power Quality data". 2017.
    10.1109/NEWCAS.2017.8010158
  80. Paim, G.; Soares, L.; Oliveira, J.F.R.; Costa, E.; Bampi, S.. "A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing". 2017.
    10.1109/ICECS.2016.7841182
  81. Paim, G.; Rocha, L.M.G.; Alves, T.G.; Ferreira, R.S.; Da Costa, E.A.C.; Bampi, S.. "A power-predictive environment for fast and power-aware ASIC-Based FIR filter design". 2017.
    10.1145/3109984.3110021
  82. Silveira, D.; Porto, M.; Bampi, S.. "Performance and energy consumption analysis of the X265 video encoder". 2017.
    10.23919/EUSIPCO.2017.8081463
  83. Leonhardt, A.; Ferreira, L.F.; Bampi, S.; Manera, L.T.. "Effective device electrical parameter extraction of nanoscale FinFETs: Challenges and results". 2016.
    10.1109/ICM.2015.7437990
  84. Sperotto, I.; Klimach, H.; Bampi, S.. "Design and linearity analysis of a M-2M DAC for very low supply voltage". 2016.
    10.1109/ICECS.2015.7440304
  85. Cordova, D.; Klimach, H.; Toledo, P.; Bampi, S.; Fabris, E.. "A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference". 2016.
    10.1109/LASCAS.2016.7451012
  86. Monteiro, E.; Grellert, M.; Bampi, S.; Zatt, B.. "Energy-aware cache assessment of HEVC decoding". 2016.
    10.1109/ISCAS.2016.7527305
  87. Bernart, E.; Scharcanski, J.; Bampi, S.. "Segmentation and classification of melanocytic skin lesions using local and contextual features". 2016.
    10.1109/ICIP.2016.7532836
  88. Gomez, C.J.A.; Klimach, H.; Fabris, E.; Bampi, S.. "1.5 ppm/°C nano-Watt resistorless MOS-only voltage reference". 2016.
    10.1109/LASCAS.2016.7451019
  89. Vizzotto, B.; Mazui, V.; Bampi, S.. "Area efficient and high throughput CABAC encoder architecture for HEVC". 2016.
    10.1109/ICECS.2015.7440381
  90. Cordova, D.; Toledo, P.; Klimach, H.; Bampi, S.; Fabris, E.. "A 90 dB PSRR, 4 dBm EMI resistant, NMOS-only voltage reference using zero-VT active loads". 2016.
    10.1109/ISEMC.2016.7571680
  91. Santana, D.B.; Klimach, H.; Fabris, E.; Bampi, S.. "A power controlled RF CMOS class-E PA with 43% maximum efficiency in 2.2 GHz". 2016.
    10.1109/ICECS.2015.7440258
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  211. Porto, M.S.; Bampi, S.; Susin, A.A.; Agostini, L.V.. "Architectural design for the new QSDS with dynamic iteration control motion estimation algorithm targeting HDTV". 2008.
    10.1145/1404371.1404430
  212. Daitx, F.F.; Rosa, V.S.; Costa, E.; Flores, P.; Bampi, S.. "VHDL generation of optimized FIR filters". 2008.
    10.1109/ICSCS.2008.4746944
  213. De Paula, L.S.; Bampi, S.; Fabris, E.; Susin, A.A.. "A wide band CMOS differential voltage-controlled ring oscillator". 2008.
    10.1109/NEWCAS.2008.4606308
  214. Porto, M.; Agostini, L.; Bampi, S.; Susin, A.. "A high throughput and low cost Diamond Search architecture for HDTV motion estimation". 2008.
    10.1109/ICME.2008.4607614
  215. Paixão Cortes, F.; Bampi, S.. "A 40mhz 70db gain variable gain amplifier design using the gm/id design method". 2008.
    10.1145/1404371.1404399
  216. Rosa, V.S.; Staehler, W.T.; Azevedo, A.; Zatt, B.; Porto, R.E.; Agostini, L.V.; Bampi, S.; Susin, A.A.. "FPGA prototyping strategy for a H.264/AVC video decoder". 2007.
    10.1109/RSP.2007.23
  217. Cortes, F.P.; Bampi, S.. "A fully integrated CMOS RF front-end for a multi-band analog mixed-signal interface". 2007.
    10.1145/1284480.1284554
  218. Silva, T.; Vortmann, J.; Agostini, L.; Bampi, S.; Susin, A.. "FPGA based design of CAVLC and exp-golomb coders for H.264/AVC baseline entropy coding". 2007.
    10.1109/SPL.2007.371741
  219. Cortes, F.P.; Bampi, S.. "A 1.4GHz upconversion mixer design using the gm/ID method suitable for a multi-band analog interface". 2007.
    10.1109/ICECS.2007.4511261
  220. Brito, J.P.M.; Klimach, H.; Bampi, S.. "A design methodology for matching improvement in bandgap references". 2007.
    10.1109/ISQED.2007.9
  221. Brito, J.P.M.; Bampi, S.; Klimach, H.. "A 4-bits trimmed CMOS bandgap reference with an improved matching modeling design". 2007.
    10.1109/iscas.2007.378348
  222. Rosa, V.S.; Susin, A.A.; Bampi, S.. "An HDTV H.264 deblocking filter in FPGA with RGB video output". 2007.
    10.1109/VLSISOC.2007.4402519
  223. Porto, R.; Porto, M.; Bampi, S.; Agostini, L.. "High throughput architecture for forward transforms module of H.264/AVC video coding standard". 2007.
    10.1109/ICECS.2007.4510952
  224. Colombo, D.; Wirth, G.; Bampi, S.; Fayomi, C.. "Impact of noise on trim circuits for Bandgap voltage references". 2007.
    10.1109/ICECS.2007.4511106
  225. Colombo, D.; Wirth, G.; Bampi, S.. "Trim range limited by noise in bandgap voltage references". 2007.
    10.1145/1284480.1284499
  226. Azevedo, A.; Zatt, B.; Agostini, L.; Bampi, S.. "MoCHA: A bi-predictive motion compensation hardware for H.264/AVC decoder targeting HDTV". 2007.
    10.1109/iscas.2007.378828
  227. Zatt, B.; Azevedo, A.; Agostini, L.; Susin, A.; Bampi, S.. "Memory hierarchy targeting bi-predictive motion compensation for H.264/AVC decoder". 2007.
    10.1109/ISVLSI.2007.64
  228. Girardi, A.; Cortes, F.P.; Bampi, S.. "A tool for automatic design of analog circuits based on gm/ID methodology". 2006.
  229. Fabris, E.E.; Carro, L.; Bampi, S.. "Reconfigurable analog interface for mixed signal SOC". 2006.
  230. Agostini, L.; Porto, R.; Güntzel, J.; Silva, I.S.; Bampi, S.. "High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard". 2006.
  231. Rosa, V.S.; Costa, E.; Bampi, S.. "A VHDL generation tool for optimized parallel FIR filters". 2006.
    10.1109/VLSISOC.2006.313217
  232. Cortes, F.P.; Fabris, E.; Bampi, S.. "A Band-pass Gm-C Filter design based on gm/ID methodology and characterization". 2006.
    10.1145/1150343.1150401
  233. Staehler, W.T.; Berriel, E.A.; Susin, A.A.; Bampi, S.. "Architecture of an HDTV intraframe predictor for a H.264 decoder". 2006.
    10.1109/VLSISOC.2006.313238
  234. Cortes, F.P.; Girardi, A.; Bampi, S.. "Track-and-latch comparator design using associations of MOS transistors and characterization". 2006.
    10.1109/ICECS.2006.379647
  235. Azevedo, A.; Zatt, B.; Agostini, L.; Bampi, S.. "Motion compensation decoder architecture for H.264/AVC main profile targeting HDTV". 2006.
    10.1109/VLSISOC.2006.313203
  236. Agostini, L.; Porto, R.; Bampi, S.; Rosa, L.; Güntzel, J.; Silva, I.S.. "High throughput architecture for H.264/AVC forward transforms block". 2006.
    10.1145/1127908.1127982
  237. Fabris, E.E.; Carro, L.; Bampi, S.. "A digitally reconfigurable sensor interface for SOC using delta-sigma modulators". 2006.
    10.1109/IMTC.2006.236791
  238. Rosa, V.S.; Costa, E.; Bampi, S.. "A high performance parallel FIR filters generation tool". 2006.
    10.1109/RSP.2006.2
  239. Agostini, L.V.; Bampi, S.. "FPGA based architectures for H.264/AVC video compression standard". 2006.
    10.1109/FPL.2006.311361
  240. Agostini, L.V.; Bampi, S.; Silva, I.S.. "High throughput architecture of JPEG compressor for color images targeting FPGAs". 2006.
    10.1109/ICECS.2006.379749
  241. Agostini, L.V.; Azevedo Filho, A.P.; Rosa, V.S.; Berriel, E.A.; Santos, T.G.S.; Bampi, S.; Susin, A.A.. "FPGA design of a H.264/AVC main profile decoder for HDTV". 2006.
    10.1109/FPL.2006.311258
  242. Girardi, A.; Bampi, S.. "Power constrained design optimization of analog circuits based on physical gm/ID characteristics". 2006.
    10.1145/1150343.1150370
  243. Agostini, L.; Porto, M.; Güntzel, J.L.; Porto, R.; Bampi, S.. "High throughput FPGA based architecture for H.264/AVC inverse transforms and quantization". 2006.
    10.1109/MWSCAS.2006.382052
  244. Porto, M.S.; Da Silva, T.L.; Porto, R.E.C.; Agostini, L.V.; Da Silva, I.S.; Bampi, S.. "Design space exploration on the H.264 4×4 hadamard transform". 2005.
  245. Agostini, L.V.; Porto, R.C.; Bampi, S.; Silva, I.S.. "A FPGA based design of a multiplierless and fully pipelined JPEG compressor". 2005.
    10.1109/DSD.2005.6
  246. Fonseca, M.; Bampi, S.; Da Costa, E.; Monteiro, J.. "Design of a radix-2m Hybrid array multiplier using carry save adder". 2005.
    10.1109/SBCCI.2005.4286852
  247. Silva, S.V.; Bampi, S.. "Area and throughput trade-offs in the design of pipelined discrete wavelet transform architectures". 2005.
    10.1109/DATE.2005.66
  248. Dos Santos, T.G.S.; Bampi, S.; Navaux, P.O.A.; Dos Santos, R.R.; Nemirovsky, M.. "Reusing traces in a dynamic conditional execution architecture". 2005.
    10.1109/CAHPC.2005.37
  249. Galup-Montoro, C.; Orailoglu, A.; Bampi, S.. "Message from the conference chairs". 2005.
    10.1109/SBCCI.2005.4286811
  250. Azevedo, A.; Zatt, B.; Agostini, L.; Bampi, S.. "Motion compensation sample processing for HDTV H.264/AVC decoder". 2005.
    10.1109/norchp.2005.1597001
  251. Azevedo, A.; Agostini, L.; Wagner, F.; Bampi, S.; Soares, R.; Silva, I.S.. "Accelerating a multiprocessor reconfigurable architecture with pipelined VLIW units". 2005.
    10.1109/RSP.2005.10
  252. Girardi, A.; Cortes, F.P.; Conrad Jr., E.; Bampi, S.. "T-shaped association of transistors: Modeling of multiple channel lengths and regular associations". 2005.
    10.1109/SBCCI.2005.4286826
  253. Rosa, V.S.; Costa, E.; Monteiro, J.C.; Bampi, S.. "Performance evaluation of parallel FIR filter optimizations in ASICs and FPGA". 2005.
    10.1109/MWSCAS.2005.1594393
  254. Santos, E.J.P.; Bampi, S.. "Welcome to the SBMicro 2004 nano- And microelectronics for a sustainable development". 2004.
  255. De Oliveira, L.L.; Baptista, J.; Costa, E.; Bampi, S.; Monteiro, J.. "Array hybrid multiplier versus modified booth multiplier: Comparing area and power consumption of layout implementations of signed radix-4 architectures". 2004.
  256. Rosa, V.S.; Costa, E.; Monteiro, J.C.; Bampi, S.. "An improved synthesis method for low power hardwired FIR filters". 2004.
    10.1145/1016568.1016632
  257. Panato, A.; Silva, S.; Wagner, F.; Johann, M.; Reis, R.; Bampi, S.. "Design of very deep pipelined multipliers for FPGAs". 2004.
    10.1109/DATE.2004.1269200
  258. Boschetti, M.R.; Silva, I.S.; Bampi, S.. "A run-time reconfigurable datapath architecture for image processing applications". 2004.
    10.1109/DATE.2004.1269237
  259. Fabris, E.E.; Carro, L.; Bampi, S.. "Modeling and designing high performance analog reconfigurable circuits". 2004.
    10.1145/1016568.1016588
  260. Fabris, E.E.; Carro, L.; Bampi, S.. "An analog signal interface with constant performance for SOCs". 2003.
  261. Carro, L.; Corrêa, E.; Cardozo, R.; Moraes, F.; Bampi, S.. "Exploiting reconfigurability for low-power control of embedded processors". 2003.
  262. Girardi, A.; Bampi, S.. "LIT - An automatic layout generation tool for trapezoidal association of transistors for basic analog building blocks". 2003.
    10.1109/DATE.2003.1253756
  263. Girardi, A.; Cortes, F.P.; Fabris, E.; Bampi, S.. "Analog IC modules design using trapezoidal association of MOS transistors in 0.35 µm technology". 2003.
    10.1109/SBCCI.2003.1232846
  264. Dos Santos, R.R.; Dos Santos, T.G.S.; Pilla, M.L.; Navaux, P.O.A.; Bampi, S.; Nemirovsky, M.. "Complex branch profiling for dynamic conditional execution". 2003.
    10.1109/CAHPC.2003.1250318
  265. Zandonai, D.; Bampi, S.; Bergerman, M.. "ME64 - A highly scalable hardware parallel architecture motion estimation in FPGA". 2003.
    10.1109/SBCCI.2003.1232812
  266. Fabris, E.E.; Carro, L.; Bampi, S.. "A universal high-performance analog interface for signal processing SOCs". 2003.
    10.1109/SBCCI.2003.1232819
  267. Costa, E.; Bampi, S.; Monteiro, J.. "A new pipelined array architecture for signed multiplication". 2003.
    10.1109/SBCCI.2003.1232808
  268. Costa, E.; Bampi, S.; Monteiro, J.. "A new architecture for signed radix-2m pure array multipliers". 2002.
  269. Costa, E.; Bampi, S.; Monteiro, J.. "A new architecture for 2's complement Gray encoded array multiplier". 2002.
    10.1109/SBCCI.2002.1137631
  270. Boschetti, M.R.; Adário, A.M.S.; Silva, I.S.; Bampi, S.. "Techniques and mechanisms for dynamic reconfiguration in an image processor". 2002.
    10.1109/SBCCI.2002.1137655
  271. Agostini, L.V.; Silva, I.S.; Bampi, S.. "Pipelined entropy coders for JPEG compression". 2002.
    10.1109/SBCCI.2002.1137659
  272. Costa, E.; Bampi, S.; Monteiro, J.. "Power efficient arithmetic operand encoding [CMOS circuits]". 2001.
    10.1109/SBCCI.2001.953027
  273. Adário, A.M.S.; Bampi, S.. "Extending sequencing graphs for reconfigurable applications modeling". 2001.
    10.1109/SBCCI.2001.953021
  274. Gómez-Cipriano, J.L.; Pizzatto Nunes, R.; Bampi, S.; Barone, D.. "Design of functional blocks for a speech recognition portable system". 2001.
    10.1109/SBCCI.2001.952998
  275. Agostini, L.V.; Silva, I.S.; Bampi, S.. "Pipelined fast 2D DCT architecture for JPEG image compression". 2001.
    10.1109/SBCCI.2001.953032
  276. Rossetti, Rosaldo J.F.; Bampi, Sergio; Liu, Ronghui; Van Vliet, Dirck. "Agent-based framework for the assessment of drivers' decision-making". 2000.
  277. Gusmao de Lima, Fernanda; Barcelos, Marcelo; Rochol, Juergen; Bampi, Sergio; Reis, Ricardo. "Frame Stream Controller IP". 2000.
    10.1109/ISCAS.2000.857601
  278. Agostini, L.; Stemmer, G.; Prado, A.; Pacheco, R.; Campos, T.; Bampi, S.; Reis, R.. "SisECO: Design of an echo-canceling IC for base band modems". 2000.
    10.1109/SBCCI.2000.876033
  279. Da Costa, E.A.C.; Cortes, F.P.; Cardoso, R.; Carro, L.; Bampi, S.. "Modeling of short circuit power consumption using timing-only logic cell macromodels". 2000.
    10.1109/SBCCI.2000.876034
  280. Luiz Aita, A.; Bampi, S.; Choi, J.H.. "A generator of trapezoidal association of transistors (TAT): Improving analog circuits in a pre-diffused transistor array". 2000.
    10.1109/SBCCI.2000.876015
  281. Choi, Jung Hyun; Bampi, Sergio. "TAT transistors on SOT array for mixed analog/digital applications". 2000.
    10.1109/ISCAS.2000.857352
  282. Choi, J.H.; Bampi, S.; Ismail, M.. "OTA amplifiers using the principle of trapezoidal association of transistors on a sea-of-transistors digital array". 2000.
    10.1109/SSMSD.2000.836441
  283. Choi, J.H.; Bampi, S.. "OTA amplifiers design on digital sea-of-transistors array". 1999.
    10.1109/DATE.1999.761226
  284. Adario, Alexandro M.S.; Roehe, Eduardo L.; Bampi, Sergio. "Dynamically reconfigurable architecture for image processor applications". 1999.
    10.1145/309847.310012
  285. Choi, J.H.; Bampi, S.. "Trapezoidal association of transistors for mixed analog-digital circuits design on SOT array". 1999.
    10.1109/MMICA.1999.833597
  286. Choi, J.H.; Bampi, S.. "Conductances and noise in trapezoidal association of transistors for analog applications using a SOT methodology [in CMOS]". 1999.
    10.1109/SBCCI.1999.802960
  287. Choi, J.H.; Bampi, S.. "Design of CMOS OTA amplifiers and oscillators in a digital sea-of-transistors array". 1998.
    10.1109/ICECS.1998.813331
  288. Aita, Andre Luiz; Bampi, Sergio. "Design of mixed digital-analog circuits on a digital sea-of-transistors array". 1997.
  289. Uebel, Luis Felipe; Bampi, Sergio. "Timing analysis tool for VLSI CMOS synchronous circuits". 1996.
  290. Uebel, Luis Felipe; Bampi, Sergio. "Timing model for VLSI CMOS circuits verification and optimization". 1994.
  291. Bampi, S.. "PC-based automated extraction of electrical parameters for VLSI MOSFETs: Methods, algorithms, and implementation". 1990.
    10.1117/12.26308
  292. Bampi, S.; Plummer, J.D.. "MODIFIED LDD DEVICE STRUCTURES FOR VLSI.". 1985.
    10.1109/iedm.1985.190939
Artigo em revista
  1. Guilherme Paim; Hussam Amrouch; Leandro M. G. Rocha; Brunno Abreu; Eduardo Antonio Cesar da Costa; Sergio Bampi; Jorg Henkel. "A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers". IEEE Transactions on Computers (2022): 1-1. https://doi.org/10.1109/TC.2021.3050978.
    10.1109/TC.2021.3050978
  2. Guilherme Paim; Hussam Amrouch; Eduardo Antonio Cesar da Costa; Sergio Bampi; Jorg Henkel. "Bridging the Gap Between Voltage Over-Scaling and Joint Hardware Accelerator-Algorithm Closed-Loop". IEEE Transactions on Circuits and Systems for Video Technology (2022): 1-1. https://doi.org/10.1109/TCSVT.2021.3059229.
    10.1109/TCSVT.2021.3059229
  3. Silveira, B.; Paim, G.; Abreu, B.A.; dos Santos Ferreira, R.; Diniz, C.M.; da Costa, E.A.C.; Bampi, S.. "The 4-2 Fused Adder–Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures". Circuits, Systems, and Signal Processing 41 3 (2022): 1577-1595. http://www.scopus.com/inward/record.url?eid=2-s2.0-85115098957&partnerID=MN8TOARS.
    10.1007/s00034-021-01839-x
  4. Abreu, B.; Grellert, M.; Bampi, S.. "A framework for designing power-efficient inference accelerators in tree-based learning applications". Engineering Applications of Artificial Intelligence 109 (2022): http://www.scopus.com/inward/record.url?eid=2-s2.0-85122210314&partnerID=MN8TOARS.
    10.1016/j.engappai.2021.104638
  5. Pedro Toledo; Paolo Crovetti; Hamilton Klimach; Sergio Bampi; Orazio Aiello; Massimo Alioto. "A 300mV-Supply, Sub-nW-Power Digital-Based Operational Transconductance Amplifier". IEEE Transactions on Circuits and Systems II: Express Briefs 68 9 (2021): 3073-3077. https://doi.org/10.1109/TCSII.2021.3084243.
    10.1109/TCSII.2021.3084243
  6. Pedro Taua Lopes Pereira; Guilherme Paim; Patricia Ucker Leleu da Costa; Eduardo Antonio Cesar da Costa; Sergio Jose Melo de Almeida; Sergio Bampi. "Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 7 (2021): 1402-1415. https://doi.org/10.1109/TVLSI.2021.3075379.
    10.1109/TVLSI.2021.3075379
  7. Henrique Bestani Seidel; Morgana Macedo Azevedo da Rosa; Guilherme Paim; Eduardo Antonio Cesar da Costa; Sergio J. M. Almeida; Sergio Bampi. "Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing". IEEE Transactions on Circuits and Systems I: Regular Papers (2021): 1-13. https://doi.org/10.1109/TCSI.2021.3057584.
    10.1109/TCSI.2021.3057584
  8. Guilherme Paim; Georgios Zervakis; Girish Pahwa; Yogesh Singh Chauhan; Eduardo Antonio Cesar da Costa; Sergio Bampi; Jorg Henkel; Hussam Amrouch. "On the Resiliency of NCFET Circuits Against Voltage Over-Scaling". IEEE Transactions on Circuits and Systems I: Regular Papers (2021): 1-12. https://doi.org/10.1109/TCSI.2021.3058451.
    10.1109/TCSI.2021.3058451
  9. Ferreira, Guilherme; Paim, Guilherme; Rocha, Leandro M. G.; Santana, Gustavo M.; Neuenfeld, Renato H.; Costa, Eduardo A. C.; Bampi, Sergio. "Low-power fast Fourier transform hardware architecture combining a split-radix butterfly and efficient adder compressors". IET Computers & Digital Techniques 15 3 (2021): 230-240. http://dx.doi.org/10.1049/cdt2.12015.
    10.1049/cdt2.12015
  10. Fabio Luis Livi Ramos; Bruno Zatt; Marcelo Porto; Sergio Bampi. "Energy-Throughput Configurable Design for Video Processing Binary Arithmetic Encoder". IEEE Transactions on Circuits and Systems for Video Technology 31 3 (2021): 1163-1177. https://doi.org/10.1109/TCSVT.2020.2991333.
    10.1109/TCSVT.2020.2991333
  11. Morgana M. da Rosa; Henrique B. Seidel; Guilherme Paim; Eduardo A. C. da Costa; Sergio Almeida; Sergio Bampi. "An Energy-Efficient Haar Wavelet Transform Architecture for Respiratory Signal Processing". IEEE Transactions on Circuits and Systems II: Express Briefs 68 2 (2021): 597-601. https://doi.org/10.1109/TCSII.2020.3046919.
    10.1109/TCSII.2020.3046919
  12. Da Costa, P.U.; Paim, G.; Rocha, L.M.G.; Da Costa, E.A.C.; De Almeida, S.J.M.; Bampi, S.. "Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing". IEEE Transactions on Biomedical Circuits and Systems 15 5 (2021): 898-911. http://www.scopus.com/inward/record.url?eid=2-s2.0-85121741150&partnerID=MN8TOARS.
    10.1109/TBCAS.2021.3120237
  13. Grellert, M.; da Silva Cruz, L.A.; Zatt, B.; Bampi, S.. "Coding mode decision algorithm for fast HEVC transrating using heuristics and machine learning". Journal of Real-Time Image Processing 18 6 (2021): 1881-1896. http://www.scopus.com/inward/record.url?eid=2-s2.0-85099405542&partnerID=MN8TOARS.
    10.1007/s11554-020-01063-x
  14. Sapper, A.; Paim, G.; da Costa, E.A.C.; Bampi, S.. "Exploring the cordic algorithm and clock-gating for power-efficient fast fourier transform hardware architectures". Journal of Integrated Circuits and Systems 16 2 (2021): 1-11. http://www.scopus.com/inward/record.url?eid=2-s2.0-85114053279&partnerID=MN8TOARS.
    10.29292/jics.v16i2.226
  15. Seidel, H.; da Rosa, M.; Paim, G.; da Costa, E.A.C.; Almeida, S.; Bampi, S.. "Exploring multi-level composition and efficient SCM schemes for an energy-efficient wavelet haar architecture". Journal of Integrated Circuits and Systems 16 2 (2021): 1-9. http://www.scopus.com/inward/record.url?eid=2-s2.0-85114040551&partnerID=MN8TOARS.
    10.29292/jics.v16i2.242
  16. Storch, I.; Agostini, L.; Zatt, B.; Bampi, S.; Palomino, D.. "FastInter360: A Fast Inter Mode Decision for HEVC 360 Video Coding". IEEE Transactions on Circuits and Systems for Video Technology (2021): http://www.scopus.com/inward/record.url?eid=2-s2.0-85110885599&partnerID=MN8TOARS.
    10.1109/TCSVT.2021.3096752
  17. Canal, B.; Klimach, H.D.; Bampi, S.; Balen, T.R.. "Low-voltage dynamic comparator using positive feedback bulk effect on a floating inverter amplifier". Analog Integrated Circuits and Signal Processing 108 3 (2021): 511-524. http://www.scopus.com/inward/record.url?eid=2-s2.0-85107519906&partnerID=MN8TOARS.
    10.1007/s10470-021-01891-2
  18. La Rosa, A.B.; Pereira, P.T.L.; Ücker, P.; Paim, G.; da Costa, E.A.C.; Bampi, S.; Almeida, S.. "Exploring NLMS-Based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals". Circuits, Systems, and Signal Processing 40 7 (2021): 3305-3337. http://www.scopus.com/inward/record.url?eid=2-s2.0-85103221051&partnerID=MN8TOARS.
    10.1007/s00034-020-01620-6
  19. Silveira, D.S.; Amaral, L.; Povala, G.; Zatt, B.; Agostini, L.V.; Porto, M.S.; Bampi, S.. "Low-energy motion estimation memory system with dynamic management". Journal of Real-Time Image Processing 18 6 (2021): 2495-2510. http://www.scopus.com/inward/record.url?eid=2-s2.0-85107487545&partnerID=MN8TOARS.
    10.1007/s11554-021-01138-3
  20. Fonseca, A.H.O.; Santana, G.M.; Bosque Ortiz, G.M.; Bampi, S.; Dietrich, M.O.. "Analysis of ultrasonic vocalizations from mice using computer vision and machine learning". eLife 10 (2021): http://www.scopus.com/inward/record.url?eid=2-s2.0-85103307830&partnerID=MN8TOARS.
    10.7554/eLife.59161
  21. Rocha, Leandro Mateus Giacomini; Paim, Guilherme; Santana, Gustavo Madeira; Costa, Eduardo; Bampi, Sergio. "Framework-based Arithmetic Datapath Generation to Explore Parallel Binary Multipliers". Journal of Integrated Circuits and Systems 15 3 (2020): 1-10. http://dx.doi.org/10.29292/jics.v15i3.91.
    10.29292/jics.v15i3.91
  22. Juan Pablo Martinez Brito; Sergio Bampi. "Local Variability Evaluation on Effective Channel Length Extracted With Shift-and-Ratio Method". IEEE Transactions on Electron Devices 67 11 (2020): 4662-4666. https://doi.org/10.1109/TED.2020.3017178.
    10.1109/TED.2020.3017178
  23. Paim, Guilherme; Rocha, Leandro Mateus Giacomini; Amrouch, Hussam; da Costa, Eduardo Antonio Cesar; Bampi, Sergio; Henkel, Jorg. "A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders". IEEE Transactions on Circuits and Systems for Video Technology 30 10 (2020): 3814-3828. http://dx.doi.org/10.1109/tcsvt.2019.2945763.
    10.1109/tcsvt.2019.2945763
  24. Pedro Toledo; Paolo Crovetti; Hamilton Klimach; Sergio Bampi. "Dynamic and Static Calibration of Ultra-Low-Voltage, Digital-Based Operational Transconductance Amplifiers". Electronics 9 6 (2020): 983-983. https://doi.org/10.3390/electronics9060983.
    10.3390/electronics9060983
  25. Lima, Vitor Gonçalves; Paim, Guilherme; Wuerdig, Rodrigo; Rocha, Leandro Mateus Giacomini; Júnior, Leomar Da Rosa; Marques, Felipe; Valduga, Vinicius; et al. "Enhancing Side Channel Attack-Resistance of the STTL Combining Multi-Vt Transistors with Capacitance and Current Paths Counterbalancing". Journal of Integrated Circuits and Systems 15 1 (2020): 1-11. http://dx.doi.org/10.29292/jics.v15i1.100.
    10.29292/jics.v15i1.100
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    10.4304/jcp.5.10.1502-1509
  87. Porto, M.; Silva, A.; Almeida, S.; da Costa, E.; Bampi, S.. "Motion estimation architecture using efficient adder-compressors for HDTV video coding". Journal of Integrated Circuits and Systems 5 1 (2010): 78-88. http://www.scopus.com/inward/record.url?eid=2-s2.0-78149235797&partnerID=MN8TOARS.
  88. Cortes, F.P.; Bampi, S.. "A 40 MHz 70 dB gain variable gain amplifier design using the gm/ID design method". Journal of Integrated Circuits and Systems 4 1 (2009): 7-12. http://www.scopus.com/inward/record.url?eid=2-s2.0-70349998091&partnerID=MN8TOARS.
  89. Martinez Brito, J.P.; Bampi, S.. "A DC offset and CMRR analysis in a CMOS 0.35 µm operational transconductance amplifier using Pelgrom's area/accuracy tradeoff". Microelectronics Journal 40 9 (2009): 1281-1292. http://www.scopus.com/inward/record.url?eid=2-s2.0-69249217993&partnerID=MN8TOARS.
    10.1016/j.mejo.2008.02.029
  90. Brito, J.P.M.; Bampi, S.. "Design of a digital FM demodulator based on a 2nd-order all-digital phase-locked loop". Analog Integrated Circuits and Signal Processing 57 1-2 (2008): 97-105. http://www.scopus.com/inward/record.url?eid=2-s2.0-50849115796&partnerID=MN8TOARS.
    10.1007/s10470-008-9184-7
  91. Girardi, A.; Bampi, S.. "Power constrained design optimization of analog circuits based on physical gm/lD characteristics". Journal of Integrated Circuits and Systems 2 1 (2007): 22-28. http://www.scopus.com/inward/record.url?eid=2-s2.0-49749122657&partnerID=MN8TOARS.
  92. Agostini, L.; Porto, R.; Porto, M.; Silva, T.; Rosa, L.; Güntzel, J.; Silva, I.; Bampi, S.. "Forward and inverse 2-D DCT architectures targeting HDTV for H.264/AVC video compression standard". Latin American Applied Research 37 1 (2007): 11-16. http://www.scopus.com/inward/record.url?eid=2-s2.0-33847780987&partnerID=MN8TOARS.
  93. da Costa, E.; Monteiro, J.; Bampi, S.. "A new array architecture for signed multiplication using Gray encoded radix-2m operands". Integration, the VLSI Journal 40 2 (2007): 118-132. http://www.scopus.com/inward/record.url?eid=2-s2.0-33751526018&partnerID=MN8TOARS.
    10.1016/j.vlsi.2006.02.010
  94. Agostini, L.V.; Silva, I.S.; Bampi, S.. "Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs". Microprocessors and Microsystems 31 8 (2007): 487-497. http://www.scopus.com/inward/record.url?eid=2-s2.0-34948833135&partnerID=MN8TOARS.
    10.1016/j.micpro.2006.02.002
  95. Cortes, F.P.; Fabris, E.; Bampi, S.. "Analysis and design of amplifiers and comparators in CMOS 0.35 µm technology". Microelectronics Reliability 44 4 (2004): 657-664. http://www.scopus.com/inward/record.url?eid=2-s2.0-1542610627&partnerID=MN8TOARS.
    10.1016/j.microrel.2003.10.014
  96. Girardi, A.; Bampi, S.. "AC analysis of an inverter amplifier using minimum-length trapezoidal association of transistors". Microelectronics Reliability 44 4 (2004): 665-671. http://www.scopus.com/inward/record.url?eid=2-s2.0-1542610621&partnerID=MN8TOARS.
    10.1016/j.microrel.2003.10.015
  97. Agostini, L.V.; Silva, I.S.; Bampi, S.. "Parallel color space converters for JPEG image compression". Microelectronics Reliability 44 4 (2004): 697-703. http://www.scopus.com/inward/record.url?eid=2-s2.0-1542715770&partnerID=MN8TOARS.
    10.1016/j.microrel.2003.10.016
  98. Rossetti, R.J.F.; Bordini, R.H.; Bazzan, A.L.C.; Bampi, S.; Liu, R.; Vliet, D.V.. "Using BDI agents to improve driver modelling in a commuter scenario". Transportation Research Part C: Emerging Technologies 10 5-6 (2002): 373-398. http://www.scopus.com/inward/record.url?eid=2-s2.0-0036815677&partnerID=MN8TOARS.
    10.1016/S0968-090X(02)00027-X
  99. Fragoso, J.L.; Costa, E.; Rochol, J.; Bampi, S.; Reis, R.; Fragoso, J.. "Specification and design of an ethernet interface soft IP". Journal of the Brazilian Computer Society 6 3 (2000): 5-12. http://www.scopus.com/inward/record.url?eid=2-s2.0-52849123635&partnerID=MN8TOARS.
    10.1590/s0104-65002000000100002
  100. Bampi, S.. "An experiment on PC-based automated extraction of electrical parameters for VLSI MOSFETs: Methods, algorithms, and implementation". Microprocessing and Microprogramming 28 1-5 (1990): 277-282. http://www.scopus.com/inward/record.url?eid=2-s2.0-0025405253&partnerID=MN8TOARS.
    10.1016/0165-6074(90)90188-F
  101. Bampi, S.; Plummer, J.D.. "A Modified Lightly Doped Drain Structure for VLSI MOSFET's". IEEE Transactions on Electron Devices 33 11 (1986): 1769-1779. http://www.scopus.com/inward/record.url?eid=2-s2.0-0022811202&partnerID=MN8TOARS.
    10.1109/T-ED.1986.22739
Livro
  1. Paim, G.; Soares, L.B.; Rocha, L.M.G.; Abreu, B.; Santana, G.M.; Diniz, C.M.; Da Costa, E.A.C.; Bampi, S.. Low-power circuit design techniques for high-resolution video coding. 2019.
  2. Diniz, C.M.; Abreu, B.; Grellert, M.; Sampaio, F.M.; Palomino, D.; Ramos, F.L.L.; Zatt, B.; Bampi, S.. Joint algorithm-architecture design of video coding modules. 2019.
  3. Zatt, B.; Shafique, M.; Bampi, S.; Henkel, J.. 3D video coding for embedded devices: Energy efficient algorithms and architectures. 2013.
    10.1007/978-1-4614-6759-5
  4. Deprá, D.A.; Bampi, S.. Techniques for architecture design for binary arithmetic decoder engines based on bitstream flow analysis. 2011.
    10.1007/978-3-642-23120-9_10
  5. Bampi, S.; Reis, R.. Challenges and emerging technologies for system integration beyond the end of the roadmap of nano-CMOS. 2011.
    10.1007/978-3-642-23120-9_2
  6. Rosa, V.; Susin, A.; Bampi, S.. A high performance H.264 deblocking filter. 2009.
    10.1007/978-3-540-92957-4_83
  7. Da Silva, T.L.; Diniz, C.M.; Vortmann, J.A.; Agostini, L.V.; Susin, A.A.; Bampi, S.. A pipelined 8×8 2-D forward DCT hardware architecture for H.264/AVC high profile encoder. 2007.
    10.1007/978-3-540-77129-6_5
  8. Zatt, B.; Ferreira, V.; Agostini, L.; Wagner, F.R.; Susin, A.; Bampi, S.. Motion compensation hardware accelerator architecture for H.264/AVC. 2007.
    10.1007/978-3-540-77129-6_7
  9. Porto, M.; Agostini, L.; Rosa, L.; Susin, A.; Bampi, S.. High throughput hardware architecture for motion estimation with 4:1 Pel subsampling targeting digital television applications. 2007.
    10.1007/978-3-540-77129-6_8
  10. de Oliveira, L.L.; Santos, C.; Ferrão, D.; Costa, E.; Monteiro, J.; Martins, J.B.; Bampi, S.; Reis, R.. A comparison of layout implementations of pipelined and non-pipelined signed radix-4 array multiplier and modified booth multiplier architectures. 2007.
    10.1007/978-0-387-73661-7_3
  11. da Costa, E.A.C.; Monteiro, J.C.; Bampi, S.. Gray encoded arithmetic operators applied to FFT and FIR dedicated datapaths. 2006.
    10.1007/0-387-33403-3_18
  12. Zandonai, D.; Bampi, S.; Bergerman, M.. ME64 - a parallel hardware architecture for motion estimation implemented in fpga. 2004.
    10.1007/1-4020-8149-9_32
  13. Boschetti, M.R.; Bampi, S.; Silva, I.S.. Throughput and reconfiguration time trade-offs: From static to dynamic reconfiguration in dedicated image filters. 2004.
    10.1007/978-3-540-30117-2_49
  14. Fabris, E.E.; Carro, L.; Bampi, S.. Analog signal processing reconfiguration for systems-on-chip using a fixed analog cell approach. 2004.
    10.1007/978-3-540-30117-2_148

Outros

Outra produção
  1. Quality and complexity assessment of learning-based image compression solutions. 2021. Dick, J.; Abreu, B.; Grellert, M.; Bampi, S.. http://www.scopus.com/inward/record.url?eid=2-s2.0-85111399940&partnerID=MN8TOARS.
  2. Logic synthesis meets machine learning: Trading exactness for generalization. 2020. Rai, S.; Neto, W.L.; Miyasaka, Y.; Zhang, X.; Yu, M.; Yi, Q.; Fujita, M.; et al. http://www.scopus.com/inward/record.url?eid=2-s2.0-85099826652&partnerID=MN8TOARS.
Atividades

Orientação

Título / Tema
Papel desempenhado 		Curso (Tipo)
Instituição / Organização
2016/07/01 - 2021/03/24 Approximate and Timing-Speculative Hardware Design for High-Performance and Energy-Efficient Video Processing
Orientador de Guilherme Paim
 Microlectronics Engineering (Doutoramento)
Universidade Federal do Rio Grande do Sul, Brasil
2015/01/01 - 2020/02/10 A Simulation-Based Framework focused on Energy-efficient Approximate Hardware Accelerators Design
Orientador de Leonardo Bandeira Soares
 Microelectronics Engineering (Doutoramento)
Universidade Federal do Rio Grande do Sul, Brasil
2016/09/01 - 2018/01/15 Static Noise Margin Analysis for CMOS Logic Cells in Near-Threshold
Orientador de Felipe Todeschini Bortolon
 Microelectronics Engineering (Mestrado)
Universidade Federal do Rio Grande do Sul, Brasil
Distinções

Prémio

2008 Landell de Moura Award, Higher disctintion from SBMICRO